Article

Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors

Authors:

Radu Teodorescu,

Josep TorrellasAuthors Info & Claims

ISCA '08: Proceedings of the 35th Annual International Symposium on Computer Architecture

Pages 363 - 374

https://doi.org/10.1109/ISCA.2008.40

Published: 01 June 2008 Publication History

Abstract

Within-die process variation causes individual cores in a ChipMultiprocessor (CMP) to differ substantially in both static powerconsumed and maximum frequency supported. In this environment,ignoring variation effects whenscheduling applications or when managing power withDynamic Voltage and Frequency Scaling (DVFS) is suboptimal. This paper proposes variation-aware algorithms for applicationscheduling and power management. One such power managementalgorithm, called {\em LinOpt}, uses linear programmingto find the best voltage and frequency levels for each of thecores in the CMP --- maximizing throughput at a given power budget.In a 20-core CMP, the combination of variation-awareapplication scheduling and {\em LinOpt} increases the averagethroughput by 12--17\% and reduces the average $ED^2$ by 30--38\%--- all relative to using variation-awarescheduling together with a simple extension to Intel's Foxtonpower management algorithm.

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Cited By

Tonetto RNazar GBeck A(2025)A variation-aware methodology for improved processor designs for the edge computing domainDesign Automation for Embedded Systems10.1007/s10617-024-09291-129:1Online publication date: 1-Mar-2025
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Boroujerdian BJing YTripathy DKumar ASubramanian LYen LLee VVenkatesan VJindal AShearer RReddi V(2023)FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip ComplexityACM Transactions on Embedded Computing Systems10.1145/354401622:2(1-35)Online publication date: 24-Jan-2023
https://dl.acm.org/doi/10.1145/3544016
Maura DGoel TGoswami KBanerjee DDas S(2023)Variation aware power management for GPU memoriesMicroprocessors & Microsystems10.1016/j.micpro.2022.10471196:COnline publication date: 1-Feb-2023
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Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors

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cover image ACM Conferences

ISCA '08: Proceedings of the 35th Annual International Symposium on Computer Architecture

June 2008

449 pages

ISBN:9780769531748

ACM SIGARCH Computer Architecture News Volume 36, Issue 3
June 2008
449 pages
ISSN:0163-5964
DOI:10.1145/1394608
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SIGARCH: ACM Special Interest Group on Computer Architecture

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IEEE Computer Society

United States

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Published: 01 June 2008

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ISCA08: The 35th Annual International Symposium on Computer Architecture

June 21 - 25, 2008

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ISCA '08 Paper Acceptance Rate 37 of 259 submissions, 14%;

Overall Acceptance Rate 543 of 3,203 submissions, 17%

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The 52nd Annual International Symposium on Computer Architecture

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Cited By

Tonetto RNazar GBeck A(2025)A variation-aware methodology for improved processor designs for the edge computing domainDesign Automation for Embedded Systems10.1007/s10617-024-09291-129:1Online publication date: 1-Mar-2025
https://dl.acm.org/doi/10.1007/s10617-024-09291-1
Boroujerdian BJing YTripathy DKumar ASubramanian LYen LLee VVenkatesan VJindal AShearer RReddi V(2023)FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip ComplexityACM Transactions on Embedded Computing Systems10.1145/354401622:2(1-35)Online publication date: 24-Jan-2023
https://dl.acm.org/doi/10.1145/3544016
Maura DGoel TGoswami KBanerjee DDas S(2023)Variation aware power management for GPU memoriesMicroprocessors & Microsystems10.1016/j.micpro.2022.10471196:COnline publication date: 1-Feb-2023
https://dl.acm.org/doi/10.1016/j.micpro.2022.104711
Shah PShenoy RSrinivasan VBose PBuyuktosunoglu A(2022)TokenSmart: Distributed, Scalable Power Management in the Many-core EraACM Transactions on Architecture and Code Optimization10.1145/355976220:1(1-26)Online publication date: 17-Nov-2022
https://dl.acm.org/doi/10.1145/3559762
Iskandar VSalama CTaher M(2022)Dynamic thread mapping for power-efficient many-core systems under performance constraintsMicroprocessors & Microsystems10.1016/j.micpro.2022.10461493:COnline publication date: 1-Sep-2022
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Kaffes KSbirlea DLin YLo DKozyrakis CFonseca RDelimitrou COoi B(2020)Leveraging application classes to save power in highly-utilized data centersProceedings of the 11th ACM Symposium on Cloud Computing10.1145/3419111.3421274(134-149)Online publication date: 12-Oct-2020
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Chasapis DMoretó MSchulz MRountree BValero MCasas MEigenmann RDing CMcKee S(2019)Power efficient job scheduling by predicting the impact of processor manufacturing variabilityProceedings of the ACM International Conference on Supercomputing10.1145/3330345.3330372(296-307)Online publication date: 26-Jun-2019
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Rahmani ADonyanavard BMück TMoazzemi KJantsch AMutlu ODutt N(2018)SPECTRACM SIGPLAN Notices10.1145/3296957.317319953:2(169-183)Online publication date: 19-Mar-2018
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Wei XSu LTan J(2018)Multi-Core Processor Scheduling Algorithm under The Influence Of Process VariationProceedings of the 2nd International Conference on Algorithms, Computing and Systems10.1145/3242840.3242847(7-13)Online publication date: 27-Jul-2018
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Rahmani ADonyanavard BMück TMoazzemi KJantsch AMutlu ODutt NShen XTuck JBianchini RSarkar V(2018)SPECTRProceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3173162.3173199(169-183)Online publication date: 19-Mar-2018
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