Article

Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core

Authors:

Panu Hamalainen,

Timo Alho,

Marko Hannikainen,

Timo D. HamalainenAuthors Info & Claims

DSD '06: Proceedings of the 9th EUROMICRO Conference on Digital System Design

Pages 577 - 583

https://doi.org/10.1109/DSD.2006.40

Published: 30 August 2006 Publication History

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Abstract

The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption hardware core suited for devices in which low cost and low power consumption are desired. The core constitutes of a novel 8-bit architecture and supports encryption with 128-bit keys. In a 0.13 ìm CMOS technology our area optimized implementation consumes 3.1 kgates. The throughput at the maximum clock frequency of 153 MHz is 121 Mbps, also in feedback encryption modes. Compared to previous 8-bit implementations, we achieve significantly higher throughput with corresponding area. The energy consumption per processed block is also lower.

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Lee KYan MEmer JChandrakasan A(2023)SecureLoop: Design Space Exploration of Secure DNN AcceleratorsProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614273(194-208)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3614273
Dey DChandra SGhosh N(2023)HessianAuth: An ECC-based Distributed and Efficient Authentication Mechanism for 6LoWPAN Networked IoT DevicesProceedings of the 24th International Conference on Distributed Computing and Networking10.1145/3571306.3571407(227-236)Online publication date: 4-Jan-2023
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Chiosa MMaschi FMüller IAlonso GMay N(2022)Hardware acceleration of compression and encryption in SAP HANAProceedings of the VLDB Endowment10.14778/3554821.355482215:12(3277-3291)Online publication date: 1-Aug-2022
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Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core

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DSD '06: Proceedings of the 9th EUROMICRO Conference on Digital System Design

August 2006

704 pages

ISBN:0769526098

Publisher

IEEE Computer Society

United States

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Published: 30 August 2006

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Lee KYan MEmer JChandrakasan A(2023)SecureLoop: Design Space Exploration of Secure DNN AcceleratorsProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614273(194-208)Online publication date: 28-Oct-2023
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Dey DChandra SGhosh N(2023)HessianAuth: An ECC-based Distributed and Efficient Authentication Mechanism for 6LoWPAN Networked IoT DevicesProceedings of the 24th International Conference on Distributed Computing and Networking10.1145/3571306.3571407(227-236)Online publication date: 4-Jan-2023
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