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Towards Area-Efficient Path-Based In-Memory Computing Using Graph Isomorphisms

Published: 03 April 2024 Publication History

Abstract

In-memory computing has attracted significant attention due to its potential to alleviate the issues caused by the von Neumann bottleneck. Path-based computing is a recently proposed in-memory computing paradigm for evaluating Boolean functions using nanoscale crossbars. Unlike state-of-the-art paradigms that use expensive WRITE operations to execute functions, path-based computing only relies on READ operations, which translates into benefits of low power consumption and low computational delay. Unfortunately, path-based computing comes with the penalty of substantial area overhead. In this paper, we introduce the ISO framework, a hardware-software solution for minimizing the area overhead of path-based computing systems. The framework is based on mapping computation to in-memory kernels using an intermediate k-LUT representation. The k-LUTs facilitate reusing hardware resources that realize the same computational structures. The reuse is performed by detecting identical subfunctions using isomorphic graphs. We also present a set of program instruction and scheduling algorithms to facilitate the hardware reuse. We have evaluated our proposed ISO framework on the 10 ISCAS85 benchmarks. Our experimental evaluation indicates that our proposed architecture improves energy consumption, latency, and area by 1.30×, 76.59×, and 2.79× on the average compared with previous state-of-the-art methods for path-based computing.

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      cover image ACM Conferences
      ASPDAC '24: Proceedings of the 29th Asia and South Pacific Design Automation Conference
      January 2024
      1008 pages
      ISBN:9798350393545
      DOI:10.1109/3655039

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      Published: 03 April 2024

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      ASPDAC '24: 29th Asia and South Pacific Design Automation Conference
      January 22 - 25, 2024
      Incheon, Republic of Korea

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