On the OpenCL Support for Streaming Fixed-Function Accelerators on Embedded SoC FPGAs

OpenCL is used in contemporary FPGA High-level Synthesis (HLS) design tools for the development of the host-side code which controls the data transfer between the processing system and the FPGA design. High performance FPGA designs in embedded SoC FPGAs often make use of data movers with streaming capabilities for the direct data transfer between the host’s main memory and the local memory of the FPGA accelerator. Unfortunately, the OpenCL memory model does not currently support streaming data movement between the host system and the FPGA accelerator. Earlier work has shown up to 8x latency improvement in data transfer when streaming data movement is used. To emphasize on this important issue, this work extends the Portable Computing Language (PoCL) OpenCL framework to support direct streaming data movement between the host’s main memory and the accelerator’s local memory. Furthermore, this work uses the CNN-Grinder workflow to map the execution of a traffic sign recognition Convolutional Neural Network (CNN) on the SqueezeJet-3 FPGA accelerator in order to showcase the details of controlling the SqueezeJet-3 streaming accelerator from a PoCL application. Results show that it is possible to achieve high performance accelerator execution and efficiently control an FPGA streaming accelerator on an embedded SoC FPGA using OpenCL augmented with direct streaming data transfer capabilities between the host and the kernel.