Article

SMT-COMP: satisfiability modulo theories competition

Authors:

Clark Barrett,

Leonardo de Moura,

Aaron StumpAuthors Info & Claims

CAV'05: Proceedings of the 17th international conference on Computer Aided Verification

Pages 20 - 23

https://doi.org/10.1007/11513988_4

Published: 06 July 2005 Publication History

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Abstract

Decision procedures for checking satisfiability of logical formulas are crucial for many verification applications (e.g., [2,6,3]). Of particular recent interest are solvers for Satisfiability Modulo Theories (SMT). SMT solvers decide logical satisfiability (or dually, validity) with respect to a background theory in classical first-order logic with equality. Background theories useful for verification are supported, like equality and uninterpreted functions (EUF), real or integer arithmetic, and theories of bitvectors and arrays. Input formulas are often syntactically restricted; for example, to be quantifier-free or to involve only difference constraints. Some solvers support a combination of theories, or quantifiers.

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CAV'05: Proceedings of the 17th international conference on Computer Aided Verification

July 2005

564 pages

ISBN:3540272313

Editors:
Kousha Etessami
LFCS, School of Informatics, University of Edinburgh
,
Sriram K. Rajamani
LFCS, School of Informatics, Microsoft Research India

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Springer-Verlag

Berlin, Heidelberg

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Published: 06 July 2005

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