research-article

Temporal Proof Methodologies for Timed Transition-Systems

Authors:

T.A. Henzinger,

A. PnueliAuthors Info & Claims

Information and Computation, Volume 112, Issue 2

Pages 273 - 337

https://doi.org/10.1006/inco.1994.1060

Published: 01 August 1994 Publication History

Abstract

We extend the specification language of temporal logic, the corresponding verification framework, and the underlying computational model to deal with real-;time properties of reactive systems. The abstract notion of timed transition systems generalizes traditional transition systems conservatively: qualitative fairness requirements are replaced (and superseded) by quantitative lower-bound and upper-bound timing constraints on transitions. This framework can model real-time systems that communicate either through shared variables or by message passing and real-time issues such as timeouts, process priorities (interrupts), and process scheduling. We exhibit two styles for the specification of real-time systems. While the first approach uses time-bounded versions of the temporal operators, the second approach allows explicit references to time through a special clock variable. Corresponding to the two styles of specification, we present and compare two different proof methodologies for the verification of timing requirements that are expressed in these styles. For the bounded-operator style, we provide a set of proof rules for establishing bounded-invariance and bounded-responce properties of timed transition systems. This approach generalizes the standard temporal proof rules for verifying invariance and response properties conservatively. For the explicit-clock style, we exploit the observation that every time-bounded property is a safety property and use the standard temporal proof rules for establishing safety properties.

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cover image Information and Computation

Information and Computation Volume 112, Issue 2

Aug 1 1994

172 pages

ISSN:0890-5401

Editor:
Albert R. Meyer
Massachusetts Institute of Technology, Cambridge

Issue’s Table of Contents

Copyright © Academic Press.

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Academic Press, Inc.

United States

Publication History

Published: 01 August 1994

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Cited By

Liu ZTeng JLiu B(2023)Formal Aspects of Component SoftwareFormal Aspects of Component Software10.1007/978-3-031-52183-6_9(168-193)Online publication date: 26-Oct-2023
https://dl.acm.org/doi/10.1007/978-3-031-52183-6_9
(2015)Towards a verified transformation from AADL to the formal component-based language FIACREScience of Computer Programming10.1016/j.scico.2015.03.003106:C(30-53)Online publication date: 1-Aug-2015
https://dl.acm.org/doi/10.1016/j.scico.2015.03.003
Jard CLime DRoux O(2014)Blending Timed Formal Models with Clock Transition SystemsFundamenta Informaticae10.5555/2595023.2595031129:1-2(85-100)Online publication date: 1-Jan-2014
https://dl.acm.org/doi/10.5555/2595023.2595031
Fares EBodeveix JFilali M(2011)Design of a BPEL verification toolProceedings of the 8th international conference on Web Services and Formal Methods10.1007/978-3-642-29834-9_8(95-110)Online publication date: 1-Sep-2011
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Bensalem SPeled DQu HTripakis S(2008)Automatic generation of path conditions for concurrent timed systemsTheoretical Computer Science10.1016/j.tcs.2008.03.012404:3(275-292)Online publication date: 1-Sep-2008
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Joseph M(2007)Engineering the development of embedded systemsFormal methods and hybrid real-time systems10.5555/1793874.1793891(391-398)Online publication date: 1-Jan-2007
https://dl.acm.org/doi/10.5555/1793874.1793891
Grinchtein OJonsson BPettersson P(2006)Inference of event-recording automata using timed decision treesProceedings of the 17th international conference on Concurrency Theory10.1007/11817949_29(435-449)Online publication date: 27-Aug-2006
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Jagadeesan LViswanathan RWolf W(2005)Passive mid-stream monitoring of real-time propertiesProceedings of the 5th ACM international conference on Embedded software10.1145/1086228.1086291(343-352)Online publication date: 18-Sep-2005
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Hubbard TLencevicius RMetz ERaghavan G(2005)Performance Validation on Multicore Mobile DevicesVerified Software: Theories, Tools, Experiments10.1007/978-3-540-69149-5_44(413-421)Online publication date: 10-Oct-2005
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Bensalem SPeled DQu HTripakis S(2005)Generating path conditions for timed systemsProceedings of the 5th international conference on Integrated Formal Methods10.1007/11589976_2(5-19)Online publication date: 29-Nov-2005
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