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- ArticleNovember 2024
VeyMont: Choreography-Based Generation of Correct Concurrent Programs with Shared Memory
Integrated Formal MethodsPages 217–236https://doi.org/10.1007/978-3-031-76554-4_12AbstractIn the VeyMont tool, choreographies can be used to specify concurrent programs using a sequential format. To support choreography-based development, VeyMont verifies a given choreography for functional correctness and memory safety, and ...
- ArticleNovember 2024
Automated Invariant Generation for Efficient Deductive Reasoning About Embedded Systems
Software Engineering and Formal MethodsPages 404–422https://doi.org/10.1007/978-3-031-77382-2_23AbstractDeductive verification is often more efficient than alternative techniques like model checking at reasoning about functional properties of programs. This is especially true when the program under verification contains very large or unbounded data ...
- ArticleNovember 2024
Deductive Verification of SYCL in VerCors
Software Engineering and Formal MethodsPages 182–199https://doi.org/10.1007/978-3-031-77382-2_11AbstractSYCL is a C++ programming model for the development of heterogeneous programs. It uses the concept of kernels, where multiple instances of a computation are executed concurrently on a computing unit. This concurrency entails that the set of ...
- ArticleOctober 2024
Scalable Verification and Validation of Concurrent and Distributed Systems (ScaVeri) (Track Summary)
Leveraging Applications of Formal Methods, Verification and Validation. Specification and VerificationPages 269–273https://doi.org/10.1007/978-3-031-75380-0_15AbstractGiven the inherent reliance of distributed systems on concurrent programming, coupled with increased hardware concurrency and diversity, ensuring their reliability, safety, and security without compromising performance has become exceedingly ...
- ArticleOctober 2024
SpecifyThis Bridging Gaps Between Program Specification Paradigms: Track Introduction
Leveraging Applications of Formal Methods, Verification and Validation. Specification and VerificationPages 3–7https://doi.org/10.1007/978-3-031-75380-0_1AbstractWe motivate and summarise the track SpecifyThis – Bridging gaps between program specification paradigms, taking place at the International Symposium on Leveraging Applications of Formal Methods, ISoLA 2024.
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- ArticleSeptember 2024
Verifying a Radio Telescope Pipeline Using HaliVer: Solving Nonlinear and Quantifier Challenges
Formal Methods for Industrial Critical SystemsPages 152–169https://doi.org/10.1007/978-3-031-68150-9_9AbstractThis paper describes a case study to verify memory safety of a radio telescope pipeline, which was targeted with the PADRE project of Astron, SURF and the Netherlands eScienceCenter. As performance is important for this application, the ...
- ArticleJuly 2024
The VerCors Verifier: A Progress Report
- Lukas Armborst,
- Pieter Bos,
- Lars B. van den Haak,
- Marieke Huisman,
- Robert Rubbens,
- Ömer Şakar,
- Philip Tasche
Computer Aided VerificationPages 3–18https://doi.org/10.1007/978-3-031-65630-9_1AbstractThis paper gives an overview of the most recent developments on the VerCors verifier. VerCors is a deductive verifier for concurrent software, written in multiple programming languages, where the specifications are written in terms of pre-/...
- research-articleJuly 2024
Survey of annotation generators for deductive verifiers
Journal of Systems and Software (JSSO), Volume 211, Issue Chttps://doi.org/10.1016/j.jss.2024.111972AbstractDeductive verifiers require intensive user interaction in the form of writing precise specifications, thereby limiting their use in practice. While many solutions have been proposed to generate specifications, their evaluations and comparisons to ...
Highlights- A survey of tools that generate formal specifications for Java programs.
- Analysis of the impact of these tools on the overall specification writing process.
- Practical recommendations for the future development of inference tools.
- ArticleNovember 2024
The VerifyThis Collaborative Long-Term Challenge Series
- Wolfgang Ahrendt,
- Gidon Ernst,
- Paula Herber,
- Marieke Huisman,
- Raúl E. Monti,
- Mattias Ulbrich,
- Alexander Weigl
TOOLympics Challenge 2023Pages 160–170https://doi.org/10.1007/978-3-031-67695-6_6AbstractWe give a brief overview of the VerifyThis long-term challenge series. Goal of these challenges is to demonstrate practical value of formal methods, to evaluate the current tools on specifying and verifying requirements of realistic software ...
- ArticleApril 2024
First Steps towards Deductive Verification of LLVM IR
Fundamental Approaches to Software EngineeringPages 290–303https://doi.org/10.1007/978-3-031-57259-3_15AbstractOver the last years, deductive program verifiers have substantially improved, and their applicability on non-trivial applications has been demonstrated. However, a major bottleneck is that for every new programming language, a new deductive ...
- ArticleApril 2024
: Deductive Verification and Scheduling Languages Join Forces
Tools and Algorithms for the Construction and Analysis of SystemsPages 71–89https://doi.org/10.1007/978-3-031-57256-2_4AbstractThe HaliVer tool integrates deductive verification into the popular scheduling language Halide, used for image processing pipelines and array computations. HaliVer uses VerCors, a separation logic-based verifier, to verify the correctness of (1) ...
- research-articleFebruary 2024
Formal Methods for Industrial Critical Systems
International Journal on Software Tools for Technology Transfer (STTT) (STTT), Volume 26, Issue 2Pages 127–129https://doi.org/10.1007/s10009-024-00744-3AbstractTo stimulate the development and application of formal methods in industry, we need to promote research and development for the improvement of formal methods and tools for industrial applications, and we need to exchange experiences of the ...
- ArticleJanuary 2024
Deductive Verification of Parameterized Embedded Systems Modeled in SystemC
Verification, Model Checking, and Abstract InterpretationPages 187–209https://doi.org/10.1007/978-3-031-50521-8_9AbstractMajor strengths of deductive verification include modular verification and support for functional properties and unbounded parameters. However, in embedded systems, crucial safety properties often depend on concurrent process interactions, events, ...
- ArticleNovember 2023
Joining Forces! Reusing Contracts for Deductive Verifiers Through Automatic Translation
AbstractDeductive verifiers can be used to prove the correctness of programs by specifying the program’s intended behaviour using annotations such as pre- and postconditions. Unfortunately, most verifiers use their own unique specification language for ...
- proceedingJune 2023
- ArticleApril 2023
JavaBIP meets VerCors: Towards the Safety of Concurrent Software Systems in Java
Fundamental Approaches to Software EngineeringPages 143–150https://doi.org/10.1007/978-3-031-30826-0_8AbstractWe present “Verified JavaBIP”, a tool set for the verification of JavaBIP models. A JavaBIP model is a Java program where classes are considered as components, their behaviour described by finite state machine and synchronization annotations. ...
- ArticleOctober 2022
On Deductive Verification of an Industrial Concurrent Software Component with VerCors
Leveraging Applications of Formal Methods, Verification and Validation. Verification PrinciplesPages 517–534https://doi.org/10.1007/978-3-031-19849-6_29AbstractThis paper presents a case study where a concurrent module of a tunnel control system written in Java is verified for memory safety and data race freedom using VerCors, a software verification tool. This case study was carried out in close ...
- ArticleOctober 2022
Verification and Validation of Concurrent and Distributed Heterogeneous Systems (Track Summary)
Leveraging Applications of Formal Methods, Verification and Validation. Verification PrinciplesPages 417–421https://doi.org/10.1007/978-3-031-19849-6_24AbstractA major trend in computing during the last decade has been the ubiquity of distributed, heterogeneous systems that make use of multi-languages for implementation, or services delivered by IoT devices. Since all distributed systems must, by their ...