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    Quiz 2

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    Sanjyoti Das
    The document contains an 8 question quiz about concepts in operating systems related to virtual memory, page replacement policies, and memory access times. It includes questions about number of page faults using LRU, converting virtual addresses to physical addresses using a page table, page fault rates using FIFO, memory access times when pages are already in memory versus using a TLB, describing Belady's anomaly, and calculating average memory access times given hit ratios and costs for TLB hits, page table walks, and page faults.

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    Quiz 2

    Uploaded by

    Sanjyoti Das
    59 views3 pages
    The document contains an 8 question quiz about concepts in operating systems related to virtual memory, page replacement policies, and memory access times. It includes questions about number of page faults using LRU, converting virtual addresses to physical addresses using a page table, page fault rates using FIFO, memory access times when pages are already in memory versus using a TLB, describing Belady's anomaly, and calculating average memory access times given hit ratios and costs for TLB hits, page table walks, and page faults.

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    Quiz_2

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    The document contains an 8 question quiz about concepts in operating systems related to virtual memory, page replacement policies, and memory access times. It includes questions about number of page faults using LRU, converting virtual addresses to physical addresses using a page table, page fault rates using FIFO, memory access times when pages are already in memory versus using a TLB, describing Belady's anomaly, and calculating average memory access times given hit ratios and costs for TLB hits, page table walks, and page faults.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    59 views3 pages

    Quiz 2

    Uploaded by

    Sanjyoti Das
    The document contains an 8 question quiz about concepts in operating systems related to virtual memory, page replacement policies, and memory access times. It includes questions about number of page faults using LRU, converting virtual addresses to physical addresses using a page table, page fault rates using FIFO, memory access times when pages are already in memory versus using a TLB, describing Belady's anomaly, and calculating average memory access times given hit ratios and costs for TLB hits, page table walks, and page faults.

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    Quiz Test - 2 Maximum Time: 15 minutes

    Each question carries 1 mark. Answer all the questions.


    Write your name: Date:
    Write your student ID:
    Maximum Mark: 8

    1. Consider a system with 12-bit virtual and physical addresses with 256-byte pages. A virtual memory
    system exhibits the following trace of virtual addresses: 001, 002, 008, 00A, 100, 108, 20B, 20D, 305,
    216, 422, 100, 51E, 306. All numbers are given in hexadecimal. Find out the number of page faults
    that would take place if LRU policy is followed with 3 frames. The frames are initially empty.
    Ans:

    2. Consider the page table for a system with 12-bit Page Frame
    virtual and physical addresses with 256-byte 0 -
    pages. Convert the virtual address 3EF to its 1 2
    equivalent physical address in hexadecimal. All
    2 7
    numbers are given in hexadecimal. A dash for a
    page frame indicates that the page is not in 3 5
    memory. 4 -
    5 4
    6 3
    7 -
    8 6
    9 0
    Ans:

    3. A process has 100 pages. Each page has 100 locations. The process is allocated with four (04) free
    frames which were initially empty. A FIFO page replacement policy has been adopted by the process.
    The process first accessed all the locations in the forward direction (from page 0 to 99) exactly once.
    Then it accessed all the locations in the reverse direction exactly once. Find out the page fault rate.
    1
    Ans:

    4. A process has 16 pages, and all these pages are available in the memory. The respective frame
    numbers for these pages are maintained in a page table which is kept in the main memory. The main
    memory access time for the system where the above process is executed is 10 ns. During execution of
    this process all the pages are accessed only once from page 0 to 15 sequentially. Ignoring any other
    overhead, find out the memory access time for this process.
    Ans:

    5. A process has 16 pages, and all these pages are available in the memory. The respective frame
    numbers for these pages are maintained in a page table which is kept in the main memory. The main
    memory access time for the system where the above process is executed is 10 ns. During execution of
    this process all the pages are accessed only once from page 0 to 15 sequentially. An improvement over
    the present system has been incorporated by introducing a TLB with four entries which can keep four
    frame numbers. The TLB search/access time is 1 ns. Initially the TLB was empty. Once a TLB miss
    occurs, the TLB is updated with a working set of four consecutive pages (including the currently
    missed page) to take benefit from spatial locality of reference. Find out the memory access time for
    the process.
    Ans:

    6. Suppose the time to service a page fault is on the average 10 milliseconds, while a memory access
    time takes 1 microsecond. Then a 99.99% hit ratio results in average memory access time of :
    Ans:

    2
    7. Describe Belady’s anomaly in one or two sentences.
    Ans:

    8. Consider a system with several running processes. The system is running a modern OS that uses virtual
    addresses and demand paging. It has been empirically observed that the memory access times in the
    system under various conditions are: t1 when the logical memory address is found in TLB cache, t2
    when the address is not in TLB but does not cause a page fault, and t3 when the address results in a page
    fault. This memory access time includes all overheads like page fault servicing and logical-to-physical
    address translation. It has been observed that, on an average, 10% of the logical address accesses result
    in a page fault. Further, of the remaining virtual address accesses, two-thirds of them can be translated
    using the TLB cache, while one-third require walking the page tables. Using the information provided
    above, calculate the average expected memory access time in the system in terms of t1, t2, and t3.
    Ans:

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