Article

An intra-task dynamic voltage scaling method for SoC design with hierarchical FSM and synchronous dataflow model

Authors:

Sunghyun Lee,

Kiyoung Choi,

Sungjoo YooAuthors Info & Claims

ISLPED '02: Proceedings of the 2002 international symposium on Low power electronics and design

Pages 84 - 87

https://doi.org/10.1145/566408.566432

Published: 12 August 2002 Publication History

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Abstract

This paper presents a method of intra-task dynamic voltage scaling (DVS) for SoC design with hierarchical FSM and synchronous dataflow model (in short, HFSM-SDF model). To have an optimal intra-task DVS, exact execution paths need to be determined in compile time or runtime. In general programs, since determining exact execution paths in compile time or runtime is not possible, existing methods assume worst/average-case execution paths and take static voltage scaling approaches. In our work, we exploit a property of HFSM-SDF model to calculate exact execution paths in runtime. With the information of exact execution paths, our DVS method can calculate exact remaining workload. The exact workload enables to calculate optimal voltage level which gives optimal energy consumption while satisfying the given timing constraint. Experiments show the effectiveness of the presented method in low-power design of an MPEG4 decoder system.

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Das SKarfa CBiswas S(2022)Accelerating NoC Verification Using a Complete Model and Active WindowIEEE Access10.1109/ACCESS.2022.319967110(88985-88999)Online publication date: 2022
https://doi.org/10.1109/ACCESS.2022.3199671
Boutellier JBhattacharyya S(2017)Low-power heterogeneous computing via adaptive execution of dataflow actors2017 IEEE International Workshop on Signal Processing Systems (SiPS)10.1109/SiPS.2017.8110002(1-6)Online publication date: Oct-2017
https://doi.org/10.1109/SiPS.2017.8110002
Zompakis NCatthoor FSoudris D(2016)Efficient Configurations for Dynamic Applications in Next Generation Mobile SystemsHandbook of Research on Next Generation Mobile Communication Systems10.4018/978-1-4666-8732-5.ch006(112-147)Online publication date: 2016
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Index Terms

An intra-task dynamic voltage scaling method for SoC design with hierarchical FSM and synchronous dataflow model
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design

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Published In

ISLPED '02: Proceedings of the 2002 international symposium on Low power electronics and design

August 2002

342 pages

ISBN:1581134754

DOI:10.1145/566408

General Chairs:
Vivek De
Intel Corporation
,
Mary Jane Irwin
Penn State University
,
Program Chairs:
Ingrid Verbauwhede
University of California, Los Angeles
,
Christian Piguet
CSEM

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 12 August 2002

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ISLPED02

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ISLPED02: International Symposium on Power Design and Electronics

August 12 - 14, 2002

California, Monterey, USA

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ISLPED '02 Paper Acceptance Rate 40 of 162 submissions, 25%;

Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

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Das SKarfa CBiswas S(2022)Accelerating NoC Verification Using a Complete Model and Active WindowIEEE Access10.1109/ACCESS.2022.319967110(88985-88999)Online publication date: 2022
https://doi.org/10.1109/ACCESS.2022.3199671
Boutellier JBhattacharyya S(2017)Low-power heterogeneous computing via adaptive execution of dataflow actors2017 IEEE International Workshop on Signal Processing Systems (SiPS)10.1109/SiPS.2017.8110002(1-6)Online publication date: Oct-2017
https://doi.org/10.1109/SiPS.2017.8110002
Zompakis NCatthoor FSoudris D(2016)Efficient Configurations for Dynamic Applications in Next Generation Mobile SystemsHandbook of Research on Next Generation Mobile Communication Systems10.4018/978-1-4666-8732-5.ch006(112-147)Online publication date: 2016
https://doi.org/10.4018/978-1-4666-8732-5.ch006
Singh ADas AKumar A(2013)Energy optimization by exploiting execution slacks in streaming applications on multiprocessor systemsProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488875(1-7)Online publication date: 29-May-2013
https://dl.acm.org/doi/10.1145/2463209.2488875
Zompakis NBartzas ACatthoor FSoudris D(2013)System scenarios-based architecture level exploration of SDR application using a network-on-chip simulation frameworkMicroprocessors & Microsystems10.1016/j.micpro.2013.07.00137:6-7(544-553)Online publication date: 1-Aug-2013
https://dl.acm.org/doi/10.1016/j.micpro.2013.07.001
Zompakis NPapanikolaou ARaghavan PSoudris DCatthoor F(2012)Enabling Efficient System Configurations for Dynamic Wireless Applications Using System ScenariosInternational Journal of Wireless Information Networks10.1007/s10776-012-0197-x20:2(140-156)Online publication date: 23-Oct-2012
https://doi.org/10.1007/s10776-012-0197-x
Nelson AMoreira OMolnos AStuijk SNguyen BGoossens K(2011)Power Minimisation for Real-Time Dataflow ApplicationsProceedings of the 2011 14th Euromicro Conference on Digital System Design10.1109/DSD.2011.19(117-124)Online publication date: 31-Aug-2011
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Gheorghita SPalkovic MHamers JVandecappelle AMamagkakis SBasten TEeckhout LCorporaal HCatthoor FVandeputte FBosschere K(2009)System-scenario-based design of dynamic embedded systemsACM Transactions on Design Automation of Electronic Systems10.1145/1455229.145523214:1(1-45)Online publication date: 23-Jan-2009
https://dl.acm.org/doi/10.1145/1455229.1455232
Gheorghita SBasten TCorporaal H(2008)Application Scenarios in Streaming-Oriented Embedded-System DesignIEEE Design & Test10.1109/MDT.2008.15825:6(581-589)Online publication date: 1-Nov-2008
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Phatrapornnant TPont M(2006)Reducing Jitter in Embedded Systems Employing a Time-Triggered Software Architecture and Dynamic Voltage ScalingIEEE Transactions on Computers10.1109/TC.2006.2955:2(113-124)Online publication date: 1-Feb-2006
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