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SWITTEST: automatic switch-level fault simulation and test evaluation of switched-capacitor systems

Authors:

S. Mir,

A. Rueda,

T. Olbrich,

E. Peralías,

J. L. HuertasAuthors Info & Claims

DAC '97: Proceedings of the 34th annual Design Automation Conference

Pages 281 - 286

https://doi.org/10.1145/266021.266099

Published: 13 June 1997 Publication History

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Abstract

A tool for the switch-level fault simulation and test evaluationof switched-capacitor systems is presented. Time or frequency-domainfault simulations with SWITCAP and time-domain faultsimulations with HSPICE can be performed. Adequate fault modelsare presented for both simulators. The tool has proven to bevery useful in the early evaluation of test strategies, providing similarresults to those obtained at the transistor-level.

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Cited By

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Hong H(2012)A Static Linear Behavior Analog Fault Model for Switched-Capacitor CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.217349231:4(597-609)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1109/TCAD.2011.2173492
Bounceur AMir SRolindez LSimeu E(2006)CAT platform for analogue and mixed-signal test evaluation and optimization2006 IFIP International Conference on Very Large Scale Integration10.1109/VLSISOC.2006.313254(320-325)Online publication date: Oct-2006
https://doi.org/10.1109/VLSISOC.2006.313254
Lubaszewski M(2006)Test and Design-for-Test: from Circuits to Integrated SystemsDesign of Systems on a Chip: Design and Test10.1007/0-387-32500-X_8(159-178)Online publication date: 2006
https://doi.org/10.1007/0-387-32500-X_8
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SWITTEST: automatic switch-level fault simulation and test evaluation of switched-capacitor systems

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Published In

DAC '97: Proceedings of the 34th annual Design Automation Conference

June 1997

788 pages

ISBN:0897919203

DOI:10.1145/266021

Chairmen:
Ellen J. Yoffa
IBM T. J. Watson Research Center, Yorktown Heights, NY
,
Giovanni De Micheli
Stanford Univ., Stanford, CA
,
Jan M. Rabaey
Univ. of California, Berkeley

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Published: 13 June 1997

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DAC97: The 34th Design Automation Conference

June 9 - 13, 1997

California, Anaheim, USA

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DAC '97 Paper Acceptance Rate 139 of 400 submissions, 35%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Hong H(2012)A Static Linear Behavior Analog Fault Model for Switched-Capacitor CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.217349231:4(597-609)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1109/TCAD.2011.2173492
Bounceur AMir SRolindez LSimeu E(2006)CAT platform for analogue and mixed-signal test evaluation and optimization2006 IFIP International Conference on Very Large Scale Integration10.1109/VLSISOC.2006.313254(320-325)Online publication date: Oct-2006
https://doi.org/10.1109/VLSISOC.2006.313254
Lubaszewski M(2006)Test and Design-for-Test: from Circuits to Integrated SystemsDesign of Systems on a Chip: Design and Test10.1007/0-387-32500-X_8(159-178)Online publication date: 2006
https://doi.org/10.1007/0-387-32500-X_8
Romero EPeretti GHuertas GVázquez D(2005)Test of switched-capacitor ladder filters using OBTMicroelectronics Journal10.1016/j.mejo.2005.04.06136:12(1073-1079)Online publication date: Dec-2005
https://doi.org/10.1016/j.mejo.2005.04.061
Lubaszewski MHuertas J(2004)Test and Design-for-Test of Mixed-Signal Integrated CircuitsInformation Technology10.1007/1-4020-8159-6_7(183-212)Online publication date: 2004
https://doi.org/10.1007/1-4020-8159-6_7
Huertas GVázquez DJ.Peralías ERueda ALuis Huertas J(2002)Testing Mixed-Signal CoresIEEE Design & Test10.1109/MDT.2002.104774619:6(73-82)Online publication date: 1-Nov-2002
https://dl.acm.org/doi/10.1109/MDT.2002.1047746
Huertas GVázquez DJ.Peralías ERueda ALuis Huertas J(2002)Practical Oscillation-Based Test of Integrated FiltersIEEE Design & Test10.1109/MDT.2002.104774519:6(64-72)Online publication date: 1-Nov-2002
https://dl.acm.org/doi/10.1109/MDT.2002.1047745
Huertas GVázquez DRueda AHuertas J(1999)Effective Oscillation-Based Test for application to a DTMF Filter BankProceedings of the 1999 IEEE International Test Conference10.5555/518925.939474Online publication date: 28-Sep-1999
https://dl.acm.org/doi/10.5555/518925.939474
Mir SRueda AVázquez DHuertas JDewilde PRammig FMusgrave G(1998)Switch-level fault coverage analysis for switch-capacitor systemsProceedings of the conference on Design, automation and test in Europe10.5555/368058.368422(810-814)Online publication date: 23-Feb-1998
https://dl.acm.org/doi/10.5555/368058.368422
Mir SRueda AVazquez DHuertas J(1998)Switch-level fault coverage analysis for switched-capacitor systemsProceedings Design, Automation and Test in Europe10.1109/DATE.1998.655951(810-814)Online publication date: 1998
https://doi.org/10.1109/DATE.1998.655951

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Encyclopedia of Electronic Circuits Volume 6

Testing delay-insensitive circuits

Optimized reversible binary-coded decimal adders

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Encyclopedia of Electronic Circuits Volume 6

Testing delay-insensitive circuits

Optimized reversible binary-coded decimal adders

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