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an Extensible Heterogeneous Multi-FPGA Framework for Accelerating N-body Simulation (Abstract Only)

Published: 21 February 2016 Publication History

Abstract

N-body simulation plays a significant role in scientific research and engineering development. Direct-summation N-body algorithms compute the particle interaction in an exact way, but this algorithm have a computational complexity of $O(N^2)$. To simulate a large system efficiently and flexibly, lots of high performance implementations on FPGA have been developed.
We propose an extensible framework for heterogeneous multi-FPGA based direct-summation N-body simulation and a model to decompose workload among FPGAs. In the framework, we try to use existing FPGA boards rather than design new specialized boards to reduce cost. It can be expanded conveniently with any available FPGA board and only requires quite low communication bandwidth between FPGA boards. The communication protocol is simple and can be implemented with limited hardware/software resource. For the purpose of improving the system's performance, the model divide workload based on the logic resource, memory access bandwidth and communication bandwidth of each FPGA chip. We implemented this framework in a numerical simulation project about MOND (Modified Newtonian dynamics), and achieved two orders of magnitude speedup compared with CPU implementations.

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cover image ACM Conferences
FPGA '16: Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
February 2016
298 pages
ISBN:9781450338561
DOI:10.1145/2847263
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 21 February 2016

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Author Tags

  1. algorithms
  2. design
  3. performance

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FPGA'16
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FPGA '16 Paper Acceptance Rate 20 of 111 submissions, 18%;
Overall Acceptance Rate 125 of 627 submissions, 20%

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