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An architectural framework for migration from CISC to higher performance platforms

Authors:

Gabriel M. Silberman,

Kemal EbcioğluAuthors Info & Claims

ICS '92: Proceedings of the 6th international conference on Supercomputing

Pages 198 - 215

https://doi.org/10.1145/143369.143410

Published: 01 August 1992 Publication History

Abstract

We describe a novel architectural framework that allows software applications written for a given Complex Instruction Set Computer (CISC) to migrate to a different, higher performance architecture, without a significant investment on the part of the application user or developer. The framework provides a hardware mechanism for seamless switching between two instruction sets, resulting in a machine that enhances application performance while keeping the same program behavior (from a user perspective). High execution speed on migrated applications is achieved through automated translation of the object code of one machine to that of the other, using advanced global optimization and scheduling techniques. Issues affecting application behavior, such as precise exceptions, as well as self-modifying code, are addressed. Relaxation of full compatibility on these issues lead to further possible performance gains, encouraging applications to adopt the newer architecture.

The proposed framework offers a path for moving from complex instruction set computers (CISCs) to newer architectures, such as reduced instruction set computers (RISCs), superscalars, or very long instruction word (VLIW) machines, while protecting the extensive economic investment represented by existing software. To illustrate our approach, we show how system code written (and compiled) for the IBM System/390 can yield fine-grain parallelism, as it is targeted for execution by a VLIW machine, with encouraging performance results.

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Cited By

Ebcioglu KAltman EGschwind MSathaye S(2001)Dynamic Binary Translation and OptimizationIEEE Transactions on Computers10.1109/12.93189250:6(529-548)Online publication date: 1-Jun-2001
https://dl.acm.org/doi/10.1109/12.931892
Gschwind MEbcioğlu KAltman ESathaye SReynders JVeidenbaum A(2000)Binary translation and architecture convergence issues for IBM system/390Proceedings of the 14th international conference on Supercomputing10.1145/335231.335264(336-347)Online publication date: 8-May-2000
https://dl.acm.org/doi/10.1145/335231.335264
Conte TSathaye S(2000)Properties of Rescheduling Size Invariance for Dynamic Rescheduling-Based VLIW Cross-Generation CompatibilityIEEE Transactions on Computers10.1109/12.86802749:8(814-825)Online publication date: 1-Aug-2000
https://dl.acm.org/doi/10.1109/12.868027
Show More Cited By

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cover image ACM Conferences

ICS '92: Proceedings of the 6th international conference on Supercomputing

August 1992

495 pages

ISBN:0897914856

DOI:10.1145/143369

Chairmen:
Ken Kennedy
Rice University, Houston, TX
,
Constantine D. Polychronopoulos
Kubota Pacific Computers and CSRD

Copyright © 1992 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGARCH: ACM Special Interest Group on Computer Architecture

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Association for Computing Machinery

New York, NY, United States

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Published: 01 August 1992

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ICS92: ACM SIGARCH International Conference on Supercomputing

July 19 - 24, 1992

D. C., Washington, USA

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Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Cited By

Ebcioglu KAltman EGschwind MSathaye S(2001)Dynamic Binary Translation and OptimizationIEEE Transactions on Computers10.1109/12.93189250:6(529-548)Online publication date: 1-Jun-2001
https://dl.acm.org/doi/10.1109/12.931892
Gschwind MEbcioğlu KAltman ESathaye SReynders JVeidenbaum A(2000)Binary translation and architecture convergence issues for IBM system/390Proceedings of the 14th international conference on Supercomputing10.1145/335231.335264(336-347)Online publication date: 8-May-2000
https://dl.acm.org/doi/10.1145/335231.335264
Conte TSathaye S(2000)Properties of Rescheduling Size Invariance for Dynamic Rescheduling-Based VLIW Cross-Generation CompatibilityIEEE Transactions on Computers10.1109/12.86802749:8(814-825)Online publication date: 1-Aug-2000
https://dl.acm.org/doi/10.1109/12.868027
Ebcioğlu KAltman ESathaye SGschwind M(1999)Execution-Based Scheduling for VLIW ArchitecturesEuro-Par’99 Parallel Processing10.1007/3-540-48311-X_181(1269-1280)Online publication date: 6-Aug-1999
https://doi.org/10.1007/3-540-48311-X_181
Ebcioğlu KAltman E(1997)DAISYACM SIGARCH Computer Architecture News10.1145/384286.26412625:2(26-37)Online publication date: 1-May-1997
https://dl.acm.org/doi/10.1145/384286.264126
Ebcioğlu KAltman EPleszkun AMudge T(1997)DAISYProceedings of the 24th annual international symposium on Computer architecture10.1145/264107.264126(26-37)Online publication date: 1-Jun-1997
https://dl.acm.org/doi/10.1145/264107.264126
Conte TSathaye SBanerjia SMelvin SBeaty S(1996)A persistent rescheduled-page cache for low overhead object code compatibility in VLIW architecturesProceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture10.5555/243846.243850(4-13)Online publication date: 2-Dec-1996
https://dl.acm.org/doi/10.5555/243846.243850
Conte TSathaye SBanerjia S(1996)A persistent rescheduled-page cache for low overhead object code compatibility in VLIW architecturesProceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 2910.1109/MICRO.1996.566445(4-13)Online publication date: 1996
https://doi.org/10.1109/MICRO.1996.566445
Franklin MSohi G(1996)ARBIEEE Transactions on Computers10.1109/12.50990745:5(552-571)Online publication date: 1-May-1996
https://dl.acm.org/doi/10.1109/12.509907
Cogswell BSegall ZBic LEvripidou PBöhm WGaudiot J(1995)Performance impact of architectural features during binary to binary translationProceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques10.5555/224659.224957(302-305)Online publication date: 27-Jun-1995
https://dl.acm.org/doi/10.5555/224659.224957
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