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Algorithms for the Selection of Applied Tests when a Stored Test Produces Many Applied Tests

Authors:

Hari Addepalli,

Irith PomeranzAuthors Info & Claims

GLSVLSI '22: Proceedings of the Great Lakes Symposium on VLSI 2022

Pages 345 - 349

https://doi.org/10.1145/3526241.3530359

Published: 06 June 2022 Publication History

Abstract

Improving the quality of a test set without storing additional tests is important when a higher fault coverage is required but test data storage is limited. Such an improvement can be achieved by using every test in a base test set to apply several different tests. In this paper, we consider the case where a base test set for basic faults is used for detecting more complex faults. Depending on the operators used for producing different applied tests, the number of options available for applied tests can be large. In such cases it is necessary to select a subset of applied tests from all the available ones. We develop algorithms for solving this problem in two scenarios. In the first scenario additional coverage is required for a small subset of faults associated with specific gates. In the second scenario additional coverage is required for the entire circuit. Experimental results are presented for benchmark circuits and logic blocks of the OpenSPARC T1 microprocessor to demonstrate the effectiveness of these algorithms.

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References

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Cited By

Pomeranz I(2024)Bit-Complemented Test Data to Replace the Tail of a Fault Coverage CurveIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2024.336535532:4(609-618)Online publication date: Apr-2024
https://doi.org/10.1109/TVLSI.2024.3365355
Addepalli HPomeranz IAmyeen ENatarajan SSinha AVenkataraman S(2024)Generating Storage-Aware Test Sets Targeting Several Fault Models2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00015(15-20)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00015

Index Terms

Algorithms for the Selection of Applied Tests when a Stored Test Produces Many Applied Tests
1. Hardware
  1. Hardware test

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cover image ACM Conferences

GLSVLSI '22: Proceedings of the Great Lakes Symposium on VLSI 2022

June 2022

560 pages

ISBN:9781450393225

DOI:10.1145/3526241

General Chairs:
Ioannis Savidis
Drexel University, USA
,
Avesta Sasan
University of California, Davis, USA
,
Program Chairs:
Himanshu Thapliyal
University of Tennessee, Knoxville, USA
,
Ronald F. DeMara
University of Central Florida, USA

Copyright © 2022 ACM.

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Published: 06 June 2022

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GLSVLSI '22: Great Lakes Symposium on VLSI 2022

June 6 - 8, 2022

CA, Irvine, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Pomeranz I(2024)Bit-Complemented Test Data to Replace the Tail of a Fault Coverage CurveIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2024.336535532:4(609-618)Online publication date: Apr-2024
https://doi.org/10.1109/TVLSI.2024.3365355
Addepalli HPomeranz IAmyeen ENatarajan SSinha AVenkataraman S(2024)Generating Storage-Aware Test Sets Targeting Several Fault Models2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00015(15-20)Online publication date: 1-Jul-2024
https://doi.org/10.1109/ISVLSI61997.2024.00015

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