STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs
Authors: 
Kyuseung Han, Hyunseok Kwak, Kwang-Il Oh, Sukho Lee, HyeongUk Jang, Jae-Jin Lee, Woojoo LeeAuthors Info & Claims
Kyuseung Han, Hyunseok Kwak, Kwang-Il Oh, Sukho Lee, HyeongUk Jang, Jae-Jin Lee, Woojoo LeeAuthors Info & ClaimsPages 1 - 6
Abstract
Developing low-power neuromorphic processors capable of inferring outcomes from SNN Frameworks presents significant challenges, largely due to the gap between frameworks and analog circuit-based SNNs. This paper analyzes the root of this gap as stemming from over/underflow issues and proposes mixed-signal neurons as a solution, further developing a neural core composed of these neurons. In the development of the neural core, we incorporate a design methodology for application-specific neural core optimization. We advance to develop a neural engine as an independent IP, ultimately introducing the snnTorch Architecture (STARC), an integrated mixed-signal neuromorphic processor architecture. The STARC processor, developed as a prototype, demonstrates operational correctness and exceptional low-power performance.
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- STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs
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Published In
August 2024
384 pages
ISBN:9798400706882
DOI:10.1145/3665314
- Chair:
- Pascal Meinerzhagen,
- Program Chair:
- Kapil Dev,
- Program Co-chair:
- Jerald Yoo
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Published: 09 September 2024
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ISLPED '24
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ISLPED '24: 29th ACM/IEEE International Symposium on Low Power Electronics and Design
August 5 - 7, 2024
CA, Newport Beach, USA
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