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ML-based Physical Design Parameter Optimization for 3D ICs: From Parameter Selection to Optimization

Published: 07 November 2024 Publication History

Abstract

While various studies have shown effective parameter optimizations for specific designs, there is limited exploration of parameter optimization within the domain of 3D Integrated Circuits. We present the first comprehensive study, both qualitatively and quantitatively, comparing five state-of-the-art (SOTA) techniques for parameter optimization applied to 3D ICs. Additionally, we introduce an end-to-end machine learning-based framework, encompassing important parameter selection through optimization, all without human intervention. Extensive studies across six industrial designs under the TSMC 28nm technology node reveal that our proposed framework outperforms SOTA techniques in three different optimization objectives in both optimization quality and runtime.

References

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Heechun Park et al. Pseudo-3d physical design flow for monolithic 3d ics: Comparisons and enhancements. ACM Trans. Des. Autom. Electron. Syst., 26(5), jun 2021.
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Bon Woong Ku et al. Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(6):1151--1164, 2020.
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Sai Surya Kiran Pentapati et al. Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs. In 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), pages 1--9, 2020.
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Gauthaman Murali et al. ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs. In Proceedings of the 2022 International Symposium on Physical Design, ISPD '22, page 97--104, New York, NY, USA, 2022. Association for Computing Machinery.
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Jihye Kwon, Matthew M. Ziegler, and Luca P. Carloni. A Learning-Based Recommender System for Autotuning Design Flows of Industrial High-Performance Processors. In Proceedings of the 56th Annual Design Automation Conference 2019, DAC '19, New York, NY, USA, 2019. Association for Computing Machinery.
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Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, and Erick Carvajal Barboza. FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. In 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), pages 19--25, 2020.
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Anthony Agnesina et al. VLSI Placement Parameter Optimization using Deep Reinforcement Learning. In 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), pages 1--9, 2020.
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Yuzhe Ma et al. CAD Tool Design Space Exploration via Bayesian Optimization. In 2019 ACM/IEEE 1st Workshop on Machine Learning for CAD (MLCAD), pages 1--6, 2019.

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Published In

cover image ACM Conferences
DAC '24: Proceedings of the 61st ACM/IEEE Design Automation Conference
June 2024
2159 pages
ISBN:9798400706011
DOI:10.1145/3649329
This work is licensed under a Creative Commons Attribution International 4.0 License.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 November 2024

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  • National Science Foundation and the industry members of the CAEML I/UCRC

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DAC '24
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DAC '24: 61st ACM/IEEE Design Automation Conference
June 23 - 27, 2024
CA, San Francisco, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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62nd ACM/IEEE Design Automation Conference
June 22 - 26, 2025
San Francisco , CA , USA

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