In this paper, different structures for an elliptic filter with fixed-point arithmetic are implemented and compared. The filter must be quantized for hardware implementation. This quantization is done in two steps. First the coefficients of the filter are quantized and then the minimum required accuracy of the internal nodes is determined. According to the simulation results, lattice and DFII-parallel structures have minimal sensitivity to coefficient quantization. Also, the chip areas (i.e. gate counts)of different structures are computed. We show that overall, the DFI-parallel structure is the optimal structure for hardware implementation and requires minimal chip area at the needed precision.