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Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm

Published: 28 April 2003 Publication History

Abstract

This paper describes a power, speed and area efficient VLSI implementation of a noise whitening algorithm for a 4x4 MIMO channel. The architecture combines innovative use of Hermitian matrices to streamline the iterative calculations, with a 4x1 matrix row-column multiplier as the core component. The optimisations in the datapath reduce the power and latency needed to implement the algorithm. The Booth recoded complex multipliers use logic sharing to reduce power and complexity, and incorporate low-power sleep logic that does not increase the critical path. The design has been successfully synthesised in a 0.18μm, 1.8V CMOS technology, and has the potential to be adapted to other applications requiring matrix multiplication.

References

[1]
G. J. Foschini and M. J. Gans, "On limits of wireless communications in a fading environment when using multiple antennas," Wireless Personal Communications, vol. 6, pp. 311--335, March 1998.
[2]
I. E. Telatar, "Capacity of multi-antenna gaussian channels," European Trans. Telecomm., vol. 10, pp. 585--596, November-December 1999.
[3]
S. Venkatesan, L. Mailaender, and J. Salz, "Iterative algorithms for noise whitening." Bell Labs Technical Memorandum, in preparation.
[4]
C. R. Baugh and B. A. Wooley, "A two's complement parallel array multiplication algorithm," IEEE Transactions on Computers, vol. 22, pp. 1045--1047, December 1973.
[5]
Y. B. Mahdy, S. A. Ali, and K. M. Shaaban, "Algorithm and two efficient implementations for complex multiplier," in Proceedings of ICECS, pp. 949--953, 1999.

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  1. Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm

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      cover image ACM Conferences
      GLSVLSI '03: Proceedings of the 13th ACM Great Lakes symposium on VLSI
      April 2003
      320 pages
      ISBN:1581136773
      DOI:10.1145/764808
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      New York, NY, United States

      Publication History

      Published: 28 April 2003

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      Author Tags

      1. MIMO
      2. booth recoding
      3. matrix multipliction
      4. noise whitening

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      GLSVLSI03: Great Lakes Symposium on VLSI 2003
      April 28 - 29, 2003
      D. C., Washington, USA

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      Overall Acceptance Rate 312 of 1,156 submissions, 27%

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