Optical link and processor clustering in the delft parallel processor

The avoidance of transfer-bound processing in large parallel computers is first analyzed with respect to the processor interconnectability. A quantitative measure is introduced for the processor substask interactivity, based on the number on nonzeroes in the interaction matrix. A similar quantitative measure can be introduced for the processor interconnectability in case of a multi-bus communication system. For a parallel computer with p processors and p busses the asymptotic speedup for large p is proportional to p, both for tightly and loosely coupled tasks. In case of 2-level parallelization considerably more speedup can be obtained by application of powerful interconnects at both levels. As to the question compute- versus transfer-bound processing, it is discussed that also the choice of the data exchange protocol is of great importance. It proves that the 'newspaper' protocol in combination with full processor interconnectability is an appropriate way to avoid transfer-bound processing. For a parallel computer with many processors one global newspaper for all processors may frequently result in a too small efficiency. An improvement can be obtained through the introduction of a multi-newspaper protocol, based on the interaction matrix as a function of time. It is elucidated that this protocol requires dynamic processor clustering during a parallel run. The Delft Parallel Processor DPP84 (with maximally 16 processors) is mentioned as an example of a parallel processor, based on complete processor interconnectability, where electrical interconnects have been applied. It is discussed that for large parallel computers, like the DPP8X (with maximally 1000 processors) full interconnectability is only feasible by the way of optical interconnects, consisting of a combination of optical wave guides and free space kaleidoscopic devices and provided with multi-input, multi-output electro-to-optic and opto-o-electric transducers. As an example of an opto-to-electric transducer, the POWERRAM is discussed. This transducer has been realized as a prototype multi-accessible processor input memory IC capable to accept a multi-variable input in one data transfer clock cycle.