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On the equivalence of pull-up transistor assignment in PLA folding and distribution graph

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Wing Ning LiAuthors Info & Claims

SAC '94: Proceedings of the 1994 ACM symposium on Applied computing

Pages 374 - 378

https://doi.org/10.1145/326619.326783

Published: 06 April 1994 Publication History

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References

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C. DeMicheli and A. Sangiovanni-Vincentelli, "PLEAS- URE: A computer program for simple/multiple constrained/unconstrained folding of programmable logic arrays," Memo. 'UCB/ERL M$2/57, 1982, Univ. Calif., Berkeley, 1982.

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G. Hachtel, A. Newton, and A. Sangiovanni-Vincentelli, "An algorithm for optimal PLA folding," IEEli 7'ran.v. (.'omputer-Airh,d Design, vo'l. CAD-t, pp. 63-77, Apr. 1982.

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W. Li and $. Satmi, "Pull-up transistor folding," IEEE Trans. Computer-Aided Design, vol. CAD-9, pp. 512- 521, May. 1990.

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C. Lursinsap and D. Gajski, "A technique for pull-up transistor folding," I~EE Trar~. Computer-Aided Design, vol. CAD-7, pp. 887-896, Aug. 1988.

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V. Raghavan, "On the equivalenee of maximum carctinality ma~ching m bipartite graphs and maximum flow in unit network," TR 87-.58, Computer Science department, University of Minnesota, December 1987.

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Index Terms

On the equivalence of pull-up transistor assignment in PLA folding and distribution graph
1. Hardware
2. Mathematics of computing
  1. Discrete mathematics

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SAC '94: Proceedings of the 1994 ACM symposium on Applied computing

April 1994

598 pages

ISBN:0897916476

DOI:10.1145/326619

Chairmen:
Hal Berghel
Univ. of Arkansas, Fayetteville
,
Terry Hlengl
Knowledge Technology, Inc; and PC AI Magazine
,
Joseph Urban
Arizona State Univ., Tempe

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Publication History

Published: 06 April 1994

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Recommendations

A technique for pull-up transistor folding

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