research-article

GPUVolt: modeling and characterizing voltage noise in GPU architectures

Authors:

Vijay Janapa ReddiAuthors Info & Claims

ISLPED '14: Proceedings of the 2014 international symposium on Low power electronics and design

Pages 141 - 146

https://doi.org/10.1145/2627369.2627605

Published: 11 August 2014 Publication History

Abstract

Voltage noise is a major obstacle in improving processor energy efficiency because it necessitates large operating voltage guardbands that increase overall power consumption and limit peak performance. Identifying the leading root causes of voltage noise is essential to minimize the unnecessary guardband and maximize the overall energy efficiency. We provide the first-ever modeling and characterization of voltage noise in GPUs based on a new simulation infrastructure called GPUVolt. Using it, we identify the key intracore microarchitectural components (e.g., the register file and special functional units) that significantly impact the GPU's voltage noise. We also demonstrate that intercore-aligned microarchitectural activity detrimentally impacts the chip- wide worst-case voltage droops. On the basis of these findings, we propose a combined register-file and execution-unit throttling mechanism that smooths GPU voltage noise and reduces the guardband requirement by as much as 29%.

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Cited By

Peng JLiang TJiang JZhang YLin ZXie ZZhang W(2024)Data-Pattern-Based Predictive On-Chip Power Meter in DNN AcceleratorIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.341297843:12(4753-4766)Online publication date: Dec-2024
https://doi.org/10.1109/TCAD.2024.3412978
Zamani HBhuyan LChen JChen Z(2023)GreenMD: Energy-efficient Matrix Decomposition on Heterogeneous Multi-GPU SystemsACM Transactions on Parallel Computing10.1145/358359010:2(1-23)Online publication date: 20-Jun-2023
https://dl.acm.org/doi/10.1145/3583590
Tan JChen KWang WYan KWei X(2023)MCM-GPU Voltage Noise Characterization and Architecture-Level MitigationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.327930442:12(5084-5097)Online publication date: Dec-2023
https://doi.org/10.1109/TCAD.2023.3279304
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GPUVolt: modeling and characterizing voltage noise in GPU architectures

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cover image ACM Conferences

ISLPED '14: Proceedings of the 2014 international symposium on Low power electronics and design

August 2014

398 pages

ISBN:9781450329750

DOI:10.1145/2627369

General Chairs:
Yuan Xie
UCSB, USA
,
Tanay Karnik
Intel, USA
,
Program Chairs:
Muhammad M. Khellah
Intel, USA
,
Renu Mehra
Synopsys, USA

Copyright © 2014 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 11 August 2014

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ISLPED'14

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SIGDA

ISLPED'14: International Symposium on Low Power Electronics and Design

August 11 - 13, 2014

California, La Jolla, USA

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ISLPED '14 Paper Acceptance Rate 63 of 184 submissions, 34%;

Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

Peng JLiang TJiang JZhang YLin ZXie ZZhang W(2024)Data-Pattern-Based Predictive On-Chip Power Meter in DNN AcceleratorIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.341297843:12(4753-4766)Online publication date: Dec-2024
https://doi.org/10.1109/TCAD.2024.3412978
Zamani HBhuyan LChen JChen Z(2023)GreenMD: Energy-efficient Matrix Decomposition on Heterogeneous Multi-GPU SystemsACM Transactions on Parallel Computing10.1145/358359010:2(1-23)Online publication date: 20-Jun-2023
https://dl.acm.org/doi/10.1145/3583590
Tan JChen KWang WYan KWei X(2023)MCM-GPU Voltage Noise Characterization and Architecture-Level MitigationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.327930442:12(5084-5097)Online publication date: Dec-2023
https://doi.org/10.1109/TCAD.2023.3279304
Bairamkulov RRoy ANagarajan MSrinivas VFriedman E(2022)SPROUT—Smart Power Routing Tool for Board-Level Exploration and PrototypingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.310141141:7(2263-2275)Online publication date: Jul-2022
https://doi.org/10.1109/TCAD.2021.3101411
Tan JChen KYan K(2022)MG-Voltage: Characterizing and Mitigating Voltage Noise in MCM-GPU Architectures2022 IEEE 40th International Conference on Computer Design (ICCD)10.1109/ICCD56317.2022.00109(714-721)Online publication date: Oct-2022
https://doi.org/10.1109/ICCD56317.2022.00109
Yahya JKim JYaglikci APark JRotem ESazeides YMutlu O(2022)DarkGates: A Hybrid Power-Gating Architecture to Mitigate the Performance Impact of Dark-Silicon in High Performance Processors2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA53966.2022.00089(1170-1183)Online publication date: Apr-2022
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Zou AZhu HLeng JHe XReddi VGill CZhang X(2021)System-level Early-stage Modeling and Evaluation of IVR-assisted Processor Power Delivery SystemACM Transactions on Architecture and Code Optimization10.1145/346814518:4(1-27)Online publication date: 3-Sep-2021
https://dl.acm.org/doi/10.1145/3468145
Leng JBuyuktosunoglu ABertran RBose PZu YReddi V(2021)Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.299268440:1(171-184)Online publication date: Jan-2021
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Zamani HTripathy DJahanshahi AWong D(2021)ICAP: Designing Inrush Current Aware Power Gating Switch for GPGPU2021 IEEE International Conference on Networking, Architecture and Storage (NAS)10.1109/NAS51552.2021.9605434(1-8)Online publication date: Oct-2021
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Papadimitriou GChatzidimitriou AGizopoulos DReddi VLeng JSalami BUnsal OKestelman A(2020)Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware MarginsIEEE Transactions on Device and Materials Reliability10.1109/TDMR.2020.298981320:2(341-350)Online publication date: Jun-2020
https://doi.org/10.1109/TDMR.2020.2989813
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