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On the power of hardware transactional memory to simplify memory management

Published: 06 June 2011 Publication History

Abstract

Dynamic memory management is a significant source of complexity in the design and implementation of practical concurrent data structures. We study how hardware transactional memory (HTM) can be used to simplify and streamline memory reclamation for such data structures. We propose and evaluate several new HTM-based algorithms for the "Dynamic Collect" problem that lies at the heart of many modern memory management algorithms. We demonstrate that HTM enables simpler and faster solutions, with better memory reclamation properties, than prior approaches. Despite recent theoretical arguments that HTM provides no worst-case advantages, our results support the claim that HTM can provide significantly better common-case performance, as well as reduced conceptual complexity.

References

[1]
Advanced Micro Devices. Advanced synchronization facility proposed architectural specification, March 2009. Publication # 45432, Revision: 2.1.
[2]
Y. Afek, H. Attiya, D. Dolev, E. Gafni, M. Merritt, and N. Shavit. Atomic snapshots of shared memory. Journal of the ACM, September 1993.
[3]
H. Attiya, A. Fouren, and E. Gafni. An adaptive collect algorithm with applications. Distributed Computing, April 2002.
[4]
H. Attiya and D. Hendler. Time and space lower bounds for implementations using k-cas. IEEE Transactions on Parallel and Distributed Systems, February 2010.
[5]
C. Blundell, E. C. Lewis, and M. Martin. Deconstructing Transactions: The Subtleties of Atomicity. In the 4th Annual Workshop on Duplicating, Deconstructing, and Debunking, 2005.
[6]
D. Dice, M. Herlihy, D. Lea, Y. Lev, V. Luchangco, W. Mesard, M. Moir, K. Moore, and D. Nussbaum. Applications of the adaptive transactional memory test platform. Transact 2008 workshop. http://research.sun.com/scalable/pubs/TRANSACT2008-ATMTP-Apps.pdf.
[7]
D. Dice, Y. Lev, V. J. Marathe, M. Moir, D. Nussbaum, and M. Oleszewski. Simplifying concurrent algorithms by exploiting hardware transactional memory. In Proceedings of the 22nd ACM symposium on Parallelism in algorithms and architectures, SPAA '10, 2010.
[8]
D. Dice, Y. Lev, M. Moir, and D. Nussbaum. Early experience with a commercial hardware transactional memory implementation. In Proceeding of the 14th international conference on Architectural support for programming languages and operating systems, ASPLOS '09, 2009.
[9]
D. Dice, Y. Lev, M. Moir, D. Nussbaum, and M. Olszewski. Early experience with a commercial hardware transactional memory implementation. Technical Report TR-2009-180, Sun Microsystems Laboratories, 2009.
[10]
M. Herlihy, V. Luchangco, P. Martin, and M. Moir. Nonblocking memory management support for dynamic-sized data structures. ACM Transactions on Computer Systems, May 2005.
[11]
M. Herlihy, V. Luchangco, and M. Moir. Space and time adaptive non-blocking algorithms. Electronic Notes in Theoretical Computer Science, April 2003.
[12]
M. Herlihy and J. E. B. Moss. Transactional memory: architectural support for lock-free data structures. In Proceedings of the 20th annual international symposium on Computer architecture, ISCA '93, 1993.
[13]
JSR166: Concurrency Utilities. http://gee.cs.oswego.edu/dl/concurrency-interest/.
[14]
M. Michael. Hazard pointers: Safe memory reclamation for lock-free objects. IEEE Transactions on Parallel and Distributed Systems, June 2004.
[15]
M. M. Michael and M. L. Scott. Simple, fast, and practical non-blocking and blocking concurrent queue algorithms. In Proceedings of the 15th annual ACM symposium on Principles of distributed computing, PODC '96, 1996.
[16]
M. Saks, N. Shavit, and H. Woll. Optimal time randomized consensus making resilient algorithms fast in practice. In Proceedings of the 2nd annual ACM-SIAM symposium on Discrete algorithms, SODA '91, 1991.
[17]
Sparc International, Inc. The SPARC architecture manual, version 8, 1991.

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cover image ACM Conferences
PODC '11: Proceedings of the 30th annual ACM SIGACT-SIGOPS symposium on Principles of distributed computing
June 2011
406 pages
ISBN:9781450307192
DOI:10.1145/1993806
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 06 June 2011

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  1. hardware
  2. memory management
  3. synchronization
  4. transactional memory

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