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Exploitation of nested thread-level speculative parallelism on multi-core systems

Authors:

Alexander V. Veidenbaum,

Utpal Banerjee,

Constantine D. PolychronopoulosAuthors Info & Claims

CF '10: Proceedings of the 7th ACM international conference on Computing frontiers

Pages 99 - 100

https://doi.org/10.1145/1787275.1787302

Published: 17 May 2010 Publication History

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Abstract

Multi-cores such as the Intel Core 2 Duo, AMD Barcelona and IBM POWER6 are becoming ubiquitous. The number of cores and the resulting hardware parallelism is poised to increase rapidly in the foreseeable future. Nested thread-level speculative parallelization has been proposed as a means to exploit the hardware parallelism of such systems. In this paper, we present a methodology to gauge the efficacy of nested thread-level speculation with increasing level of nesting.

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Cited By

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Kumar SSingh SAggarwal NGupta BAlhalabi WBand S(2022)An efficient hardware supported and parallelization architecture for intelligent systems to overcome speculative overheadsInternational Journal of Intelligent Systems10.1002/int.2306237:12(11764-11790)Online publication date: 8-Sep-2022
https://dl.acm.org/doi/10.1002/int.23062
Estebanez ALlanos DGonzalez-Escribano A(2016)A Survey on Thread-Level Speculation TechniquesACM Computing Surveys10.1145/293836949:2(1-39)Online publication date: 30-Jun-2016
https://dl.acm.org/doi/10.1145/2938369
Ding WKandemir MYedlapalli PZhang YSrinivas J(2013)Locality-aware mapping and scheduling for multicoresProceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)10.1109/CGO.2013.6495009(1-12)Online publication date: 23-Feb-2013
https://dl.acm.org/doi/10.1109/CGO.2013.6495009
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Index Terms

Exploitation of nested thread-level speculative parallelism on multi-core systems
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies
2. General and reference
  1. Cross-computing tools and techniques
    1. Measurement
    2. Metrics

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Information & Contributors

Information

Published In

CF '10: Proceedings of the 7th ACM international conference on Computing frontiers

May 2010

370 pages

ISBN:9781450300445

DOI:10.1145/1787275

General Chair:
Nancy M. Amato
Texas A&M University, USA
,
Program Chairs:
Hubertus Franke
IBM Research, USA
,
Paul H.J. Kelly
Imperial College London, UK

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 17 May 2010

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CF'10

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SIGMICRO

CF'10: Computing Frontiers Conference

May 17 - 19, 2010

Bertinoro, Italy

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CF '10 Paper Acceptance Rate 30 of 113 submissions, 27%;

Overall Acceptance Rate 273 of 785 submissions, 35%

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Cited By

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Kumar SSingh SAggarwal NGupta BAlhalabi WBand S(2022)An efficient hardware supported and parallelization architecture for intelligent systems to overcome speculative overheadsInternational Journal of Intelligent Systems10.1002/int.2306237:12(11764-11790)Online publication date: 8-Sep-2022
https://dl.acm.org/doi/10.1002/int.23062
Estebanez ALlanos DGonzalez-Escribano A(2016)A Survey on Thread-Level Speculation TechniquesACM Computing Surveys10.1145/293836949:2(1-39)Online publication date: 30-Jun-2016
https://dl.acm.org/doi/10.1145/2938369
Ding WKandemir MYedlapalli PZhang YSrinivas J(2013)Locality-aware mapping and scheduling for multicoresProceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)10.1109/CGO.2013.6495009(1-12)Online publication date: 23-Feb-2013
https://dl.acm.org/doi/10.1109/CGO.2013.6495009
Yang HLi C(2012)A Speculative Thread Partitioning Method Based on WCFGProceedings of the 2012 Fourth International Symposium on Information Science and Engineering10.1109/ISISE.2012.32(109-112)Online publication date: 14-Dec-2012
https://dl.acm.org/doi/10.1109/ISISE.2012.32
Lihan Ju Ping Pan Baixing Quan Tianzhou Chen Minghui Wu (2012)Block-based hardware scheduler design on Many-core architecture2012 IEEE International Symposium on Industrial Electronics10.1109/ISIE.2012.6237193(814-819)Online publication date: May-2012
https://doi.org/10.1109/ISIE.2012.6237193

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Speculative parallelization using software multi-threaded transactions

Challenges in exploitation of loop parallelism in embedded applications

Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading