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Postplacement voltage assignment under performance constraints

Published: 25 July 2008 Publication History

Abstract

Multi-Vdd is an effective method to reduce both leakage and dynamic power. A key challenge in a multi-Vdd design is to control the complexity of the power-supply system and limit the demand for level shifters. This can be tackled by grouping cells of different supply voltages into a small number of voltage islands. Recently, an elegant algorithm was proposed for generating voltage islands that balance the power-versus-design-cost tradeoff under performance requirement, according to the placement proximity of the critical cells. One prerequisite of this algorithm is an initial voltage assignment at the standard-cell level that meets timing. In this article, we present a novel method to produce quality voltage assignment which not only meets timing but also forms good proximity of the critical cells to provide a smooth input to the aforementioned voltage island generation. Our algorithm is based on effective delay budgeting and efficient computation of physical proximity by Voronoi diagram. Our extensive experiments on real industrial designs show that our algorithm leads to 25%--75% improvement in the voltage island generation in terms of the number of voltage islands generated, with computation time only linear to design size.

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Wu, H., Wong, M. D., Liu, I.-M., and Wang, Y. 2007. Placement proximity based voltage island grouping under timing requirement. IEEE Trans. Comput.-Aided Des. 26, 7, 1256--1269.

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        cover image ACM Transactions on Design Automation of Electronic Systems
        ACM Transactions on Design Automation of Electronic Systems  Volume 13, Issue 3
        July 2008
        370 pages
        ISSN:1084-4309
        EISSN:1557-7309
        DOI:10.1145/1367045
        Issue’s Table of Contents
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Publication History

        Published: 25 July 2008
        Accepted: 01 December 2007
        Revised: 01 December 2007
        Received: 01 September 2007
        Published in TODAES Volume 13, Issue 3

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        Author Tags

        1. Low power
        2. Voronoi diagram
        3. timing
        4. voltage assignment

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