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Automatic test generation using quadratic 0-1 programming

Published: 03 January 1991 Publication History

Abstract

We recently proposed an unconventional digital circuit modeling technique and formulated test generation as an energy minimization problem [7]. Although energy minimization is as hard as test generation, the new approach has two advantages. Since the circuit function is mathematically expressed, operations research techniques like linear and non-linear programming can be applied to test generation. The non-causal form of the model makes parallel processing possible. The energy function E, a quadratic 0-1 function, is split into two sub-functions, a homogeneous posiform and an inhomogeneous posiform. The minimum of E is the sum of the minima of the two sub-functions, each having a minimum value of 0. We obtain a minimizing point of the homogeneous posiform, in time complexity that is linear in the number of sub-function terms, and check if the other sub-function becomes 0. When both become 0, we have a test vector. We discuss several easily parallelizable speedup techniques using the transitive closure and other graph properties. Preliminary results on combinational circuits confirm the feasibility of this technique.

References

[1]
V. D. Agrawn/and S. C. Seth. Test Generation for VLSI Chips. IEEE Computer Society Press, Washington, D.C., 1988.
[2]
A. V. Aho, J. E. Hopcrof~, and J. D. Ullman. The Desi#n and A nalyai8 of Com~utcr Algorithms. Addison-Wesley Publishing Company, 1974.
[3]
B. AspvMl, M. F. Plass, mad R. E. Tarjma. A Linear-Time AI- gorlthrn for Testing the Truth of Certain Quantified Boolem~ Formulas. Information Processing Letter~, 3(8):121-123, March 1979.
[4]
A. Billionnet and B. Jaumard. A Decomposition Method for Minimizing Quadratic Pseudo Boolean Functions. Operations Re. search Letters, 8(3):161-163, June 1980.
[5]
F. Brglez and H. F~iwaxa. A. ~qeutr~d INetllst of I0 Combinatorlal Benchmark Circuits mad a Target Translator in FORTRAN. In Proc. of the Int'l. Syrup. on Circuits and Systems, pages 663--698, June 1985.
[6]
S. T. Chal~adhar. Massively Parallel Automatic Test Gene~afion. PhD thesis, Department of Computer Sciexxce, Rutgers University, May 1990. In preparation.
[7]
S. T. Chakradhar, M. L. Bushnell, and V. D. Agrawal. Toward Massively Parallel Automatic Test Generation. IEEE Trans. on Compu~er-A ided Design, 1990. Accepted for publication.
[8]
A. Gibbons and W. Rytter. Et~ieient Parallel Algorithms. Cambridge University Press, U.K., 1988.
[9]
J. 3. Hopfield. Artificial Neural Networks. IEEE Circ~it~ and De,ices AIag., 4(5):3-10, Sept. 1988.
[10]
T. Larrabee. Efficient Generation of Test Patterns Using Boolean Difference. In IEEE Proc. of the In~'l. Test Conj., pages 795-801, Aug. 1989.
[11]
P. R. Schneider. On the Necessity to Examine D-Chains ha Diagnostic Test Generation. IBM J. of Res. and Dev., 11(1):114, Jan. 1967'.
[12]
M. H. Schulz, E. Trlsehler, mad T. M. Sin-left. SOCRATES: A Highly Efficient Automatic Test Pattern Generation System. IEEE Trans. on Computer.Aided Design, 7(1):126--136, Jan. 1988.
[13]
The TTL Data Book for Design Engineers (Second edition), p~ge 199. Texas Instnxments, 1973.
[14]
N. Karmarkar, M. G. C. Resende, and K. G. Ramakrislman. An Interior-Point Algori~lun for Zero-One Iax~,egex Programming. In The 13th Int'l Syrup. on Mathematical Programming, Mathematical Programming Society, Sept. 1988.

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cover image ACM Conferences
DAC '90: Proceedings of the 27th ACM/IEEE Design Automation Conference
January 1991
742 pages
ISBN:0897913639
DOI:10.1145/123186
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 03 January 1991

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June 24 - 27, 1990
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DAC '90 Paper Acceptance Rate 125 of 427 submissions, 29%;
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