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CLUMAP: Clustered Mapper for CGRAs with Predication

Published: 07 November 2024 Publication History

Abstract

Coarse-grained reconfigurable architectures (CGRAs) have gained popularity as accelerators for compute-intensive kernels. Complex CGRA architectures that support key features such as multi-context and predication are being developed to support a wider range of kernels. However, mapping applications on these complex architectures poses significant challenges. In this paper, we provide an architecture-agnostic clustered mapping technique and a new cost function tailored for simulated-annealing placement. The mapper simplifies placement and routing phases, demonstrating significant speedup for popular CGRA architectures: HyCUBE and ADRES. Additionally, our method demonstrates an increase in mapping success for the ADRES architecture.

References

[1]
Samit Chaudhuri and Asmus Hetzel. 2017. SAT-based compilation to a non-von Neumann processor. In IEEE/ACM ICCAD. 675--682.
[2]
S Alexander Chin and Jason H Anderson. 2018. An architecture-agnostic integer linear programming approach to CGRA mapping. In ACM/IEEE DAC.
[3]
S. Alexander Chin, Noriaki Sakamoto, Allan Rui, Jim Zhao, Jin Hee Kim, Yuko Hara-Azumi, and Jason Anderson. 2017. CGRA-ME: A unified framework for CGRA modelling and exploration. In IEEE ASAP. 184--189.
[4]
Carl Ebeling, Darren C. Cronquist, and Paul Franklin. 1996. RaPiD --- Reconfigurable pipelined datapath. In FPL, Reiner W. Hartenstein and Manfred Glesner (Eds.). 126--135.
[5]
Stephen Friedman, Allan Carroll, Brian Van Essen, Benjamin Ylvisaker, Carl Ebeling, and Scott Hauck. 2009. SPR: an architecture-adaptive CGRA mapping tool. In ACM FPGA. 191--200.
[6]
Kyuseung Han, Junwhan Ahn, and Kiyoung Choi. 2013. Power-efficient predication techniques for acceleration of control flow execution on CGRA. ACM TACO 10, 2 (2013), 1--25.
[7]
Manupa Karunaratne, Aditi Kulkarni Mohite, Tulika Mitra, and Li-Shiuan Peh. 2017. HyCUBE: A CGRA with reconfigurable single-cycle multi-hop interconnect. In IEEE/ACM DAC.
[8]
Manupa Karunaratne, Dhananjaya Wijerathne, Tulika Mitra, and Li-Shiuan Peh. 2019. 4D-CGRA: Introducing branch dimension to spatio-temporal application mapping on CGRAs. In ACM/IEEE ICCAD.
[9]
Austin Liolli, Omar Ragheb, and Jason Anderson. 2021. Profiling-Based Control-Flow Reduction in High-Level Synthesis. In IEEE FPT.
[10]
Leibo Liu, Jianfeng Zhu, Zhaoshi Li, Yanan Lu, Yangdong Deng, Jie Han, Shouyi Yin, and Shaojun Wei. 2019. A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications. ACM Comput. Surv. 52, 6, Article 118 (10 2019), 39 pages.
[11]
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, and Rudy Lauwereins. 2002. DRESC: A retargetable compiler for coarse-grained reconfigurable architectures. In IEEE FPT. 166--173.
[12]
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, and Rudy Lauwereins. 2003. ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. In FPL.
[13]
Omar Ragheb, Rami Beidas, and Jason Anderson. 2023. Statically Scheduled vs. Elastic CGRA Architectures: Impact on Mapping Feasibility. In IEEE IPDPS Workshops (CGRA4HPC). 468--475.
[14]
M. Suzuki, Y. Hasegawa, Y. Yamada, N. Kaneko, K. Deguchi, H. Amano, K. Anjo, M. Motomura, K. Wakabayashi, T. Toi, and T. Awashima. 2004. Stream applications on the dynamically reconfigurable processor. In IEEE FPT. 137--144.
[15]
Cheng Tan, Chenhao Xie, Ang Li, Kevin J. Barker, and Antonino Tumeo. 2020. OpenCGRA: An Open-Source Unified Framework for Modeling, Testing, and Evaluating CGRAs. In IEEE ICCD. 381--388.
[16]
Matthew JP Walker and Jason H Anderson. 2019. Generic connectivity-based CGRA mapping via integer linear programming. In IEEE FCCM. 65--73.

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cover image ACM Conferences
DAC '24: Proceedings of the 61st ACM/IEEE Design Automation Conference
June 2024
2159 pages
ISBN:9798400706011
DOI:10.1145/3649329
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Published: 07 November 2024

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Author Tags

  1. CGRAS
  2. predication
  3. mapping
  4. CAD
  5. multi-context

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DAC '24
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DAC '24: 61st ACM/IEEE Design Automation Conference
June 23 - 27, 2024
CA, San Francisco, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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