Accelerating the Task Activation and Data Communication for Dataflow Computing
ICPP Workshops '22: Workshop Proceedings of the 51st International Conference on Parallel Processing
Article No.: 27, Pages 1 - 7
Abstract
The hybrid dataflow/von-Neumann [1] architectures may differ in implementations but all follow similar principles: they harness the parallelism and data synchronization inherent to the dataflow model, yet maintain the programmability of the von-Neumann model. In this paper, we raise a new kind of hybrid dataflow/von-Neumann architectures, which contains TAU (Task Activated Unit) and SPM [9] (scratchpad memory) components, by which we can enhance parallel efficiency. We also implement the prototype design, integrated with peripheral devices and verify the whole system on FPGA. Finally, we deploy operating system on the hardware system and profile the performance. The experimental results show that the performance is improved by 3.07%∼10.32% under the random data flow graph, the performance of inter-core communication is improved by 4% and the hardware acceleration effect is achieved.
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Published In
August 2022
233 pages
ISBN:9781450394451
DOI:10.1145/3547276
Copyright © 2022 Owner/Author.
This work is licensed under a Creative Commons Attribution International 4.0 License.
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Association for Computing Machinery
New York, NY, United States
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Published: 13 January 2023
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ICPP '22
ICPP '22: 51st International Conference on Parallel Processing
August 29 - September 1, 2022
Bordeaux, France
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