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Cross-layer fault-space pruning for hardware-assisted fault injection

Published: 24 June 2018 Publication History

Abstract

With shrinking structure sizes, soft-error mitigation has become a major challenge in the design and certification of safety-critical embedded systems. Their robustness is quantified by extensive fault-injection campaigns, which on hardware level can nevertheless cover only a tiny part of the fault space.
We suggest Fault-Masking Terms (MATEs) to effectively prune the fault space for gate-level fault injection campaigns by using the (software-induced) hardware state to dynamically cut off benign faults. Our tool applied to an AVR core and a size-optimized MSP430 implementation shows that up to 21 percent of all SEUs on flip-flop level are masked within one clock cycle.

References

[1]
Vishwani D Agrawal, AVSS Prasad, and Madhusudan V Atre. 2003. Fault collapsing via functional dominance. In ITC.
[2]
Jean Arlat, Martine Aguera, Louis Amat, Yves Crouzet, Jean-Charles Fabre, Jean-Claude Laprie, Eliane Martins, and David Powell. 1990. Fault Injection for Dependability Validation: A Methodology and Some Applications. IEEE Trans. on Software Engineering 16, 2 (1990).
[3]
Ghazanfar Asadi and Mehdi Baradaran Tahoori. 2005. An analytical approach for soft error rate estimation in digital circuits. In ISCAS 2005. IEEE.
[4]
Alfredo Benso and Paolo Ernesto Prinetto. 2003. Fault injection techniques and tools for embedded systems reliability evaluation. Kluwer Academic Publishers.
[5]
Hyungmin Cho, S. Mirkhani, Chen-Yong Cher, J.A. Abraham, and S. Mitra. 2013. Quantitative evaluation of soft error injection techniques for robust system design. In DAC '13.
[6]
C. Constantinescu. 2003. Trends and challenges in VLSI circuit reliability. Micro, IEEE 23, 4 (2003).
[7]
Mojtaba Ebrahimi, Mohammad Hadi Moshrefpour, Mohammad Saber Golanbari, and Mehdi B Tahoori. 2016. Fault injection acceleration by simultaneous injection of non-interacting faults. In DAC '16. ACM.
[8]
Mojtaba Ebrahimi, Nour Sayed, Maryam Rashvand, and Mehdi B Tahoori. 2015. Fault injection acceleration by architectural importance sampling. In 10th Intl. Conf. on Hardware/Software Codesign and System Synthesis. IEEE.
[9]
L. Entrena, M. Garcia-Valderas, R. Fernandez-Cardenal, A. Lindoso, M. Portela, and C. Lopez-Ongil. 2012. Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection. IEEE Trans. on Computers 61, 3 (2012).
[10]
Tigranuhi Grigoryan, Heghineh Malkhasyan, Gevorg Mushyan, and Valery Vardanian. 2015. Fault collapsing for digital circuits based on relations between stuck-at faults. In Computer Science and Information Technologies (CSIT). IEEE.
[11]
Ulf Gunneflo, Johan Karlsson, and Jan Torin. 1989. Evaluation of Error Detection Schemes Using Fault Injection by Heavy-ion Radiation. In 19th Intl. Symp. on Fault-Tolerant Computing. IEEE.
[12]
Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, and Pradeep Ramachandran. 2012. Relyzer: Exploiting Application-Level Fault Equivalence to Analyze Application Resiliency to Transient Faults. In ASPLOS '12. ACM Press.
[13]
Siva Kumar Sastry Hari, Sarita V Adve, Helia Naeimi, and Pradeep Ramachandran. 2012. Relyzer: Exploiting application-level fault equivalence to analyze application resiliency to transient faults. In ACM SIGPLAN Notices, Vol. 47. ACM.
[14]
IEC. 1998. IEC 61508 - Functional safety of electrical/electronic/programmable electronic safety-related systems. Intl. Electrotechnical Commission.
[15]
ISO 26262-9. 2011. ISO 26262-9:2011: Road vehicles - Functional safety - Part 9: Automotive Safety Integrity Level (ASIL)-oriented and safety-oriented analyses. Intl. Organization for Standardization.
[16]
Henrique Madeira, Mário Rela, Francisco Moreira, and João Gabriel Silva. 1994. RIFLE: A general purpose pin-level fault injector. In 1st European Dependable Computing Conf. (EDCC). Springer-Verlag.
[17]
W. Mansour and R. Velazco. 2013. An Automated SEU Fault-Injection Method and Tool for HDL-Based Designs. IEEE Trans. on Nuclear Science 60, 4 (2013).
[18]
Mayler Martins, Jody Maick Matos, Renato P. Ribas, André Reis, Guilherme Schlinker, Lucio Rech, and Jens Michelsen. 2015. Open Cell Library in 15Nm FreePDK Technology. In Intl. Symp. on Physical Design (ISPD '15). ACM.
[19]
Rochus Nowosielski, Lukas Gerlach, Stephan Bieband, Guillermo Payá-Vayá, and Holger Blume. 2015. FLINT: Layout-oriented FPGA-based Methodology for Fault Tolerant ASIC Design. In Design, Automation & Test in Europe Conf. (DATE '15). EDA Consortium.
[20]
AVSS Prasad, Vishwani D Agrawal, and Madhusudan V Atre. 2002. A new algorithm for global fault collapsing into equivalence and dominance sets. In Intl. Test Conf. IEEE.
[21]
Raja K. K. R. Sandireddy and Vishwani D. Agrawal. 2007. Using Hierarchy in Design Automation: The Fault Collapsing Problem. In 11th VLSI Design and Test Symp.
[22]
Behrooz Sangchoolie, Roger Johansson, and Johan Karlsson. 2017. Light-Weight Techniques for Improving the Controllability and Efficiency of ISA-Level Fault Injection Tools. In Pacific Rim Intl. Symp. on Dependable Computing (PRDC). IEEE.
[23]
Horst Schirmeier, Christoph Borchert, and Olaf Spinczyk. 2015. Avoiding Pitfalls in Fault-Injection Based Comparison of Program Susceptibility to Soft Errors. In 45th Dependable Systems and Networks (DSN). IEEE.
[24]
Horst Schirmeier, Martin Hoffmann, Christian Dietrich, Michael Lenz, Daniel Lohmann, and Olaf Spinczyk. 2015. FAIL*: An Open and Versatile Fault-Injection Framework for the Assessment of Software-Implemented Hardware Fault Tolerance. In 11th European Dependable Computing Conf. (EDCC).
[25]
D. Skarin, R. Barbosa, and J. Karlsson. 2010. GOOFI-2: A tool for experimental dependability assessment. In 39th Dependable Systems and Networks (DSN). IEEE.
[26]
Vilas Sridharan, Jon Stearley, Nathan DeBardeleben, Sean Blanchard, and Sudhanva Gurumurthi. 2013. Feng Shui of Supercomputer Memory: Positional Effects in DRAM and SRAM Faults. In Intl. Conf. for High Performance Computing, Networking, Storage and Analysis (SC '13). ACM Press, Article 22.
[27]
Raimund Ubar, Lembit Jürimägi, Elmet Orasson, and Jaan Raik. 2015. Scalable algorithm for structural fault collapsing in digital circuits. In Very Large Scale Integration (VLSI-SoC). IEEE.
[28]
Jiesheng Wei, Anna Thomas, Guanpeng Li, and Karthik Pattabiraman. 2014. Quantifying the Accuracy of High-Level Fault Injection Techniques for Hardware Faults. In 44th Dependable Systems and Networks (DSN). IEEE.

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    cover image ACM Conferences
    DAC '18: Proceedings of the 55th Annual Design Automation Conference
    June 2018
    1089 pages
    ISBN:9781450357005
    DOI:10.1145/3195970
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    Published: 24 June 2018

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    DAC '18: The 55th Annual Design Automation Conference 2018
    June 24 - 29, 2018
    California, San Francisco

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    • (2024)BEC: Bit-Level Static Analysis for Reliability against Soft ErrorsProceedings of the 2024 IEEE/ACM International Symposium on Code Generation and Optimization10.1109/CGO57630.2024.10444844(283-295)Online publication date: 2-Mar-2024
    • (2023)Increased Detection of Hard-to-Detect Stuck-at Faults during Scan ShiftJournal of Electronic Testing10.1007/s10836-023-06060-z39:2(227-243)Online publication date: 25-Apr-2023
    • (2022)ACTOR: Accelerating Fault Injection Campaigns Using Timeout Detection Based on AutocorrelationComputer Safety, Reliability, and Security10.1007/978-3-031-14835-4_17(252-266)Online publication date: 25-Aug-2022
    • (2020)Validity frame concept as effort-cutting technique within the verification and validation of complex cyber-physical systemsProceedings of the 23rd ACM/IEEE International Conference on Model Driven Engineering Languages and Systems: Companion Proceedings10.1145/3417990.3419226(1-10)Online publication date: 16-Oct-2020

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