research-article

Making B⁺-tree efficient in PCM-based main memory

Authors:

Wang-Chien Lee,

Yuan XieAuthors Info & Claims

ISLPED '14: Proceedings of the 2014 international symposium on Low power electronics and design

Pages 69 - 74

https://doi.org/10.1145/2627369.2627630

Published: 11 August 2014 Publication History

Abstract

Phase change memory (PCM) is a promising technology for building future large-scale and low-power main memory systems. Main memory databases (MMDBs) can benefit from the high density of PCM. However, its long write latency, high write energy, and limited lifetime, bring challenges to database algorithm design for PCM-based memory systems. In this paper, we focus on making B⁺-tree PCM-friendly by reducing the write accesses to PCM. We propose three different schemes. Experimental results show that they can efficiently improve the performance, reduce the memory energy consumption, and improve the lifetime for PCM memory.

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Cited By

Kim H(2024)Compiler-assisted data placement for heterogeneous memory systemsIEICE Electronics Express10.1587/elex.21.2024046021:19(20240460-20240460)Online publication date: 10-Oct-2024
https://doi.org/10.1587/elex.21.20240460
Attiya HBen-Baruch OFatourou PHendler DKosmas ELee JAgrawal KSpear M(2022)Detectable recovery of lock-free data structuresProceedings of the 27th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/3503221.3508444(262-277)Online publication date: 2-Apr-2022
https://dl.acm.org/doi/10.1145/3503221.3508444
Dharamjeet Chen TChang YWu CLee CShih W(2021)Beyond Write-Reduction Consideration: A Wear-Leveling-Enabled B⁺-Tree Indexing Scheme Over an NVRAM-Based ArchitectureIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.304967740:12(2455-2466)Online publication date: Dec-2021
https://doi.org/10.1109/TCAD.2021.3049677
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Index Terms

Making B⁺-tree efficient in PCM-based main memory
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory
2. Information systems
  1. Data management systems
    1. Data structures
      1. Data access methods

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cover image ACM Conferences

ISLPED '14: Proceedings of the 2014 international symposium on Low power electronics and design

August 2014

398 pages

ISBN:9781450329750

DOI:10.1145/2627369

General Chairs:
Yuan Xie
UCSB, USA
,
Tanay Karnik
Intel, USA
,
Program Chairs:
Muhammad M. Khellah
Intel, USA
,
Renu Mehra
Synopsys, USA

Copyright © 2014 ACM.

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Publication History

Published: 11 August 2014

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National Science Foundation

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ISLPED'14

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SIGDA

ISLPED'14: International Symposium on Low Power Electronics and Design

August 11 - 13, 2014

California, La Jolla, USA

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ISLPED '14 Paper Acceptance Rate 63 of 184 submissions, 34%;

Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

Kim H(2024)Compiler-assisted data placement for heterogeneous memory systemsIEICE Electronics Express10.1587/elex.21.2024046021:19(20240460-20240460)Online publication date: 10-Oct-2024
https://doi.org/10.1587/elex.21.20240460
Attiya HBen-Baruch OFatourou PHendler DKosmas ELee JAgrawal KSpear M(2022)Detectable recovery of lock-free data structuresProceedings of the 27th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/3503221.3508444(262-277)Online publication date: 2-Apr-2022
https://dl.acm.org/doi/10.1145/3503221.3508444
Dharamjeet Chen TChang YWu CLee CShih W(2021)Beyond Write-Reduction Consideration: A Wear-Leveling-Enabled B⁺-Tree Indexing Scheme Over an NVRAM-Based ArchitectureIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.304967740:12(2455-2466)Online publication date: Dec-2021
https://doi.org/10.1109/TCAD.2021.3049677
Zhang WShenker SZhang ILu SHowell J(2020)Persistent state machines for recoverable in-memory storage systems with NVRamProceedings of the 14th USENIX Conference on Operating Systems Design and Implementation10.5555/3488766.3488824(1029-1046)Online publication date: 4-Nov-2020
https://dl.acm.org/doi/10.5555/3488766.3488824
Hao XLersch LWang TOukid I(2020)PiBench onlineProceedings of the VLDB Endowment10.14778/3415478.341548313:12(2817-2820)Online publication date: 1-Aug-2020
https://dl.acm.org/doi/10.14778/3415478.3415483
Wang CChattopadhyay SBrihadiswarn G(2020)Crab-treeACM Transactions on Embedded Computing Systems10.1145/339623619:5(1-26)Online publication date: 26-Sep-2020
https://dl.acm.org/doi/10.1145/3396236
Liang YChen TChang YChen SLam KLi WShih W(2019)Enabling Sequential-write-constrained B+-tree Index Scheme to Upgrade Shingled Magnetic Recording Storage PerformanceACM Transactions on Embedded Computing Systems10.1145/335820118:5s(1-20)Online publication date: 8-Oct-2019
https://dl.acm.org/doi/10.1145/3358201
Lee SMohan JKashyap SKim TChidambaram VBrecht TWilliamson C(2019)RecipeProceedings of the 27th ACM Symposium on Operating Systems Principles10.1145/3341301.3359635(462-477)Online publication date: 27-Oct-2019
https://dl.acm.org/doi/10.1145/3341301.3359635
Hardock SKoch AVinçon TPetrov I(2019)IPA-IDXProceedings of the 15th International Workshop on Data Management on New Hardware10.1145/3329785.3329929(1-3)Online publication date: 1-Jul-2019
https://dl.acm.org/doi/10.1145/3329785.3329929
Petrov IKoch AVinçon THardock SRiegger C(2019)Hardware-Assisted Transaction Processing: NVMEncyclopedia of Big Data Technologies10.1007/978-3-319-77525-8_202(934-941)Online publication date: 20-Feb-2019
https://doi.org/10.1007/978-3-319-77525-8_202
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