research-article

An event-driven simulation methodology for integrated switching power supplies in SystemVerilog

Authors:

Myeongjae Park,

Jaeha KimAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 137, Pages 1 - 7

https://doi.org/10.1145/2463209.2488903

Published: 29 May 2013 Publication History

Abstract

Emerging power-supply-on-chip applications such as on-chip DC-DC conversion, energy harvesting, and LED drivers use switching regulator ICs integrated with digital controllers. Although the resulting mixed-signal systems call for efficient system-level behavioral simulation, this remains difficult due to the fast switching and slow transients of the regulator and the high complexity of the controller. This paper presents a truly event-driven approach for modeling and simulating such integrated power systems entirely in SystemVerilog. By modeling various switching regulator topologies as switched linear networks whose responses can be expressed as a sum of complex exponentials, ct^m-1e^--atu(t), the accurate voltage/current waveforms can be captured by updating the coefficients, c, at each input or switching event. The model is applied to two examples, a power factor corrector and switched-capacitor DC-DC converter, and the results demonstrate that the proposed simulator can achieve 20~100× improvements in speed while maintaining SPICE-level accuracy in evaluating power efficiency, steady-state ripples, and power factor.

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Cited By

Jeong IPark J(2024)X-PIM: Fast Modeling and Validation Framework for Mixed-Signal Processing-in-Memory Using Compressed Equivalent Model in System Verilog2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546655(1-6)Online publication date: 25-Mar-2024
https://doi.org/10.23919/DATE58400.2024.10546655
Yeh WChang CYin STsai C(2023)Mixed-Level Design Methodology With SystemVerilog Behavior Models for Digitally Controlled Power Converter ICs2023 IEEE 12th Global Conference on Consumer Electronics (GCCE)10.1109/GCCE59613.2023.10315270(1172-1175)Online publication date: 10-Oct-2023
https://doi.org/10.1109/GCCE59613.2023.10315270
Kim SKim J(2023)Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits With Trajectory-Based Reachable SetsIEEE Access10.1109/ACCESS.2023.329582511(74602-74613)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3295825
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An event-driven simulation methodology for integrated switching power supplies in SystemVerilog
1. Hardware

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 29 May 2013

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May 29 - June 7, 2013

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Cited By

Jeong IPark J(2024)X-PIM: Fast Modeling and Validation Framework for Mixed-Signal Processing-in-Memory Using Compressed Equivalent Model in System Verilog2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546655(1-6)Online publication date: 25-Mar-2024
https://doi.org/10.23919/DATE58400.2024.10546655
Yeh WChang CYin STsai C(2023)Mixed-Level Design Methodology With SystemVerilog Behavior Models for Digitally Controlled Power Converter ICs2023 IEEE 12th Global Conference on Consumer Electronics (GCCE)10.1109/GCCE59613.2023.10315270(1172-1175)Online publication date: 10-Oct-2023
https://doi.org/10.1109/GCCE59613.2023.10315270
Kim SKim J(2023)Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits With Trajectory-Based Reachable SetsIEEE Access10.1109/ACCESS.2023.329582511(74602-74613)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3295825
Dimitrios Kizas TCrespi LMalcovati PBaschirotto A(2021)A Library of High-Level Models for the Simulation of DC-DC Converters2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS)10.1109/LASCAS51355.2021.9459163(1-4)Online publication date: 21-Feb-2021
https://doi.org/10.1109/LASCAS51355.2021.9459163
Kim SPark HKim J(2021)Safety Verification of AMS Circuits with Piecewise-Linear System Reachability Analysis2021 18th International SoC Design Conference (ISOCC)10.1109/ISOCC53507.2021.9614029(203-206)Online publication date: 6-Oct-2021
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Lim BHorowitz M(2016)Error Control and Limit Cycle Elimination in Event-Driven Piecewise Linear Analog Functional ModelsIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2015.251269963:1(23-33)Online publication date: Jan-2016
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Shera EWegener C(2015)Buck converter modeling in SystemVerilog for verification and virtual test applications2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)10.1109/IMS3TW.2015.7177865(1-6)Online publication date: Jun-2015
https://doi.org/10.1109/IMS3TW.2015.7177865
Jang JYang SKim J(2013)Event-driven simulation of Volterra series models in SystemVerilogProceedings of the IEEE 2013 Custom Integrated Circuits Conference10.1109/CICC.2013.6658460(1-4)Online publication date: Sep-2013
https://doi.org/10.1109/CICC.2013.6658460

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