A noniterative equivalent waveform model for timing analysis in presence of crosstalk
Abstract
References
Index Terms
- A noniterative equivalent waveform model for timing analysis in presence of crosstalk
Recommendations
Reduced thickness interconnect model using GNR to avoid crosstalk effects
In this research article, we propose a reduced thickness multilayer graphene nanoribbon (MLGNR) interconnect model to reduce crosstalk effects. The $$10\times $$10 higher current capability of MLGNR than copper (Cu) makes it an attractive choice to ...
Statistical timing and leakage power analysis of PD-SOI digital circuits
This paper presents a fast statistical static timing and leakage power analysis in Partially-Depleted Silicon-On-Insulator (PD-SOI) CMOS circuits in BSIMSOI3.2 100 nm technology. The proposed timing analysis considers floating body effect on the ...
A leakage-tolerant low-swing circuit style in partially depleted silicon-on-insulator CMOS technologies
The parasitic bipolar leakage and the large subthreshold leakage due to high floating-body voltage reduce the noise margin and increase the delay of the circuits in the partially depleted silicon-on-insulator (PD/SOI). Differential cascode voltage ...
Comments
Information & Contributors
Information
Published In
Publisher
Association for Computing Machinery
New York, NY, United States
Journal Family
Publication History
Check for updates
Author Tags
Qualifiers
- Research-article
- Research
- Refereed
Funding Sources
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 230Total Downloads
- Downloads (Last 12 months)1
- Downloads (Last 6 weeks)0
Other Metrics
Citations
View Options
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in