Article

TAPE: a transactional application profiling environment

Authors:

Austen McDonald,

Brian D. Carlstrom,

JaeWoong Chung,

Christos Kozyrakis,

Kunle OlukotunAuthors Info & Claims

ICS '05: Proceedings of the 19th annual international conference on Supercomputing

Pages 199 - 208

https://doi.org/10.1145/1088149.1088176

Published: 20 June 2005 Publication History

Abstract

Transactional Coherence and Consistency (TCC) provides a new parallel programming model that uses transactions as the basic unit of parallel work and communication. TCC simplifies the development of correct parallel code because hardware provides transaction atomicity and ordering. Nevertheless, the programmer or a dynamic compiler must still optimize the parallel code for performance.This paper presents TAPE, a hardware and software infrastructure for profiling in TCC systems. TAPE extends the hardware for transactional execution to identify performance impediments such as dependence violations, buffer overflows, and work imbalance. It filters infrequent events to reduce resource requirements and allows the programmer to focus on the most important bottlenecks. We demonstrate that TAPE introduces minimal die area and performance overhead and can be used continuously, even for production runs. Moreover, we demonstrate how to leverage the profiling information to guide optimization for a set of parallel applications. TAPE accurately identifies the source code location and type of the most important bottlenecks, allowing a programmer to achieve maximum parallel speedup with a few profiling steps.

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Cited By

Gottschlich JKnauerhase RPokam G(2013)But how do we really debug transactional memory programs?Proceedings of the 5th USENIX Conference on Hot Topics in Parallelism10.5555/3241639.3241648(9-9)Online publication date: 24-Jun-2013
https://dl.acm.org/doi/10.5555/3241639.3241648
Schindewolf MRocker BKarl WHeuveline V(2013)Evaluation of two formulations of the conjugate gradients method with transactional memoryProceedings of the 19th international conference on Parallel Processing10.1007/978-3-642-40047-6_52(508-520)Online publication date: 26-Aug-2013
https://dl.acm.org/doi/10.1007/978-3-642-40047-6_52
Gaudet MAmaral JYew PCho SDeRose LLilja D(2012)Transactional event profiling in a best-effort hardware transactional memory systemProceedings of the 21st international conference on Parallel architectures and compilation techniques10.1145/2370816.2370904(475-476)Online publication date: 19-Sep-2012
https://dl.acm.org/doi/10.1145/2370816.2370904
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cover image ACM Conferences

ICS '05: Proceedings of the 19th annual international conference on Supercomputing

June 2005

414 pages

ISBN:1595931678

DOI:10.1145/1088149

General Chair:
Arvind
MIT
,
Program Chair:
Larry Rudolph
MIT

Copyright © 2005 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 20 June 2005

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ICS05: International Conference on Supercomputing 2005

June 20 - 22, 2005

Massachusetts, Cambridge

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Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Cited By

Gottschlich JKnauerhase RPokam G(2013)But how do we really debug transactional memory programs?Proceedings of the 5th USENIX Conference on Hot Topics in Parallelism10.5555/3241639.3241648(9-9)Online publication date: 24-Jun-2013
https://dl.acm.org/doi/10.5555/3241639.3241648
Schindewolf MRocker BKarl WHeuveline V(2013)Evaluation of two formulations of the conjugate gradients method with transactional memoryProceedings of the 19th international conference on Parallel Processing10.1007/978-3-642-40047-6_52(508-520)Online publication date: 26-Aug-2013
https://dl.acm.org/doi/10.1007/978-3-642-40047-6_52
Gaudet MAmaral JYew PCho SDeRose LLilja D(2012)Transactional event profiling in a best-effort hardware transactional memory systemProceedings of the 21st international conference on Parallel architectures and compilation techniques10.1145/2370816.2370904(475-476)Online publication date: 19-Sep-2012
https://dl.acm.org/doi/10.1145/2370816.2370904
Arcas OKirchhofer PSonmez NSchindewolf MUnsal OKarl WCristal A(2012)A Low-Overhead Profiling and Visualization Framework for Hybrid Transactional MemoryProceedings of the 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2012.11(1-8)Online publication date: 29-Apr-2012
https://dl.acm.org/doi/10.1109/FCCM.2012.11
Zyulkyarov FStipic SHarris TUnsal OCristal AHur IValero M(2011)Profiling and Optimizing Transactional Memory ApplicationsInternational Journal of Parallel Programming10.1007/s10766-011-0177-240:1(25-56)Online publication date: 28-Jul-2011
https://doi.org/10.1007/s10766-011-0177-2
Harris TLarus JRajwar R(2010)Transactional Memory, 2nd editionSynthesis Lectures on Computer Architecture10.2200/S00272ED1V01Y201006CAC0115:1(1-263)Online publication date: 22-Dec-2010
https://doi.org/10.2200/S00272ED1V01Y201006CAC011
Zyulkyarov FStipic SHarris TUnsal OCristal AHur IValero MSalapura VGschwind MKnoop J(2010)Discovering and understanding performance bottlenecks in transactional applicationsProceedings of the 19th international conference on Parallel architectures and compilation techniques10.1145/1854273.1854311(285-294)Online publication date: 11-Sep-2010
https://dl.acm.org/doi/10.1145/1854273.1854311
Zyulkyarov FHarris TUnsal OCristal AValero M(2010)Debugging programs that use atomic blocks and transactional memoryACM SIGPLAN Notices10.1145/1837853.169346345:5(57-66)Online publication date: 9-Jan-2010
https://dl.acm.org/doi/10.1145/1837853.1693463
Zyulkyarov FHarris TUnsal OCristal AValero MGovindarajan RPadua DHall M(2010)Debugging programs that use atomic blocks and transactional memoryProceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/1693453.1693463(57-66)Online publication date: 9-Jan-2010
https://dl.acm.org/doi/10.1145/1693453.1693463
Ramadan HRossbach CWitchel E(2008)Dependence-aware transactional memory for increased concurrencyProceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture10.5555/1521747.1521799(246-257)Online publication date: 8-Nov-2008
https://dl.acm.org/doi/10.5555/1521747.1521799
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