VLSI array processors: Designs and applications
SY Kung - 1988., IEEE International Symposium on Circuits …, 1988 - ieeexplore.ieee.org
1988., IEEE International Symposium on Circuits and Systems, 1988•ieeexplore.ieee.org
The key issues in designing an algorithm-oriented array processor are addressed in this
tutorial. The author discusses how to express the parallelism and description of the space-
time activities associated with a parallel algorithm, how to systematically derive a VLSI array
hardware design, and how to apply the methodology to image/vision processing
applications. The applications include 2-D convolution for edge detection, rank order filter for
noise removal and artificial neural nets for associative classification.<>
tutorial. The author discusses how to express the parallelism and description of the space-
time activities associated with a parallel algorithm, how to systematically derive a VLSI array
hardware design, and how to apply the methodology to image/vision processing
applications. The applications include 2-D convolution for edge detection, rank order filter for
noise removal and artificial neural nets for associative classification.<>
The key issues in designing an algorithm-oriented array processor are addressed in this tutorial. The author discusses how to express the parallelism and description of the space-time activities associated with a parallel algorithm, how to systematically derive a VLSI array hardware design, and how to apply the methodology to image/vision processing applications. The applications include 2-D convolution for edge detection, rank order filter for noise removal and artificial neural nets for associative classification.< >
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