Intel® Transactional Synchronization Extensions Page 1 Intel® Transactional Synchronization
Extensions ARCS004 Ravi Rajwar, CPU Architect, Intel Martin Dixon, Principal Engineer, Intel
Page 2 2 Agenda • The Synchronization Problem • Intel® Transactional Synchronization
Extensions • Implementation Insights‡ • Software Enabling and Considerations • Summary ‡ For
the next generation Intel® microarchitecture (Haswell) Page 3 3 Agenda • The Synchronization
Problem • Intel® Transactional Synchronization Extensions • Implementation Insights‡ • Software …

Transactional Memory was recently integrated in Intel processors under the name TSX. We
show that its performance can be significantly affected by the configuration of its interplay
with the software-based fallback: in fact, there does not seem to exist a single configuration
that can perform best independently of the application and workload. We address this
challenge by introducing an innovative self-tuning approach that exploits lightweight
reinforcement learning techniques to identify the optimal TSX configuration in a workload …

The increasing number of cores every generation poses challenges for high-performance in-
memory database systems. While these systems use sophisticated high-level algorithms to
partition a query or run multiple queries in parallel, they also utilize low-level
synchronization mechanisms to synchronize access to internal database data structures.
Developers often spend significant development and verification effort to improve
concurrency in the presence of such synchronization. The Intel® Transactional …