State persistence: a property for guiding test generation
I Pomeranz, SM Reddy - Proceedings of the 19th ACM Great Lakes …, 2009 - dl.acm.org
Proceedings of the 19th ACM Great Lakes symposium on VLSI, 2009•dl.acm.org
We study a property of circuit states referred to as persistence. The persistence pi (s) of a
state s is the number of next-state variables whose values are specified (0 or 1) when a fully-
unspecified primary input vector is applied to the circuit in state s. When a next-state variable
Yi is specified under a fully-unspecified primary input vector, there are faults in the input
cone of Yi that cannot be detected on Yi. We demonstrate through experimental results that
when lower-persistence states are used as scan-in states, the resulting tests detect larger …
state s is the number of next-state variables whose values are specified (0 or 1) when a fully-
unspecified primary input vector is applied to the circuit in state s. When a next-state variable
Yi is specified under a fully-unspecified primary input vector, there are faults in the input
cone of Yi that cannot be detected on Yi. We demonstrate through experimental results that
when lower-persistence states are used as scan-in states, the resulting tests detect larger …
We study a property of circuit states referred to as persistence. The persistence pi(s) of a state s is the number of next-state variables whose values are specified (0 or 1) when a fully-unspecified primary input vector is applied to the circuit in state s. When a next-state variable Yi is specified under a fully-unspecified primary input vector, there are faults in the input cone of Yi that cannot be detected on Yi. We demonstrate through experimental results that when lower-persistence states are used as scan-in states, the resulting tests detect larger numbers of faults. Low-persistence states are thus preferable as scan-in states during test generation. We also discuss the computation of low-persistence states.
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