Enabling stateful functions for stream processing in the programmable data plane
S Ossen, LRB Brasilino, L Dalessandro… - Proceedings of the 2nd …, 2022 - dl.acm.org
Proceedings of the 2nd Workshop on High Performance Serverless Computing, 2022•dl.acm.org
Sensor-rich environments are crucial components of the Internet of Things ecosystem and
benefit from real-time applications. Many applications perform real-time analytics on these
IoT workloads by performing continuous stream processing for a window of sequence data
elements. However, executing light-weight stateful functions on server CPUs adds to the
communication latency of each small message in a high data rate environment, primarily
due to messages traveling through a complex network stack to reach the CPU. Thus, we …
benefit from real-time applications. Many applications perform real-time analytics on these
IoT workloads by performing continuous stream processing for a window of sequence data
elements. However, executing light-weight stateful functions on server CPUs adds to the
communication latency of each small message in a high data rate environment, primarily
due to messages traveling through a complex network stack to reach the CPU. Thus, we …
Sensor-rich environments are crucial components of the Internet of Things ecosystem and benefit from real-time applications. Many applications perform real-time analytics on these IoT workloads by performing continuous stream processing for a window of sequence data elements. However, executing light-weight stateful functions on server CPUs adds to the communication latency of each small message in a high data rate environment, primarily due to messages traveling through a complex network stack to reach the CPU. Thus, we present an in-network function deployment architecture with low latency and low resource footprint by introducing a new compute layer. We propose an FPGA-based Switch/NIC prototype with a compute layer utilizing RISC-V soft cores and High-Level Synthesis modules. We evaluate the design for two microbenchmarks on a Zynq 7000 FPGA each, achieving less than 10 μs in latency and consuming less than 6 % of resources.
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