Design of single-bit fault-tolerant reversible circuits
IEEE Design & Test, 2020•ieeexplore.ieee.org
This article introduces redundant design approaches for reversible circuits that have the
ability to detect and tolerate single-bit fault without the need of conventional voting scheme.
Experiments preformed show that the proposed scheme reduces the gate cost on average
with up to 28% as compared with tri-modular redundant circuits.
ability to detect and tolerate single-bit fault without the need of conventional voting scheme.
Experiments preformed show that the proposed scheme reduces the gate cost on average
with up to 28% as compared with tri-modular redundant circuits.
This article introduces redundant design approaches for reversible circuits that have the ability to detect and tolerate single-bit fault without the need of conventional voting scheme. Experiments preformed show that the proposed scheme reduces the gate cost on average with up to 28% as compared with tri-modular redundant circuits.
ieeexplore.ieee.org
Showing the best result for this search. See all results