A functional test generation technique for RTL datapaths

B Alizadeh, M Fujita - … High Level Design Validation and Test …, 2012 - ieeexplore.ieee.org
2012 IEEE International High Level Design Validation and Test …, 2012ieeexplore.ieee.org
This paper presents an automatic test pattern generation (ATPG) technique applicable to
register transfer level (RTL) datapath circuits which are usually very hard-to-test due to the
presence of complex loop structures. Although to achieve high fault coverage it is essential
to symbolically simulate all possible execution paths, we have come up with a case splitting
mechanism which makes use of path sensitization information from the faulty location to
primary outputs so that the size of formulae to be solved is significantly reduced …
This paper presents an automatic test pattern generation (ATPG) technique applicable to register transfer level (RTL) datapath circuits which are usually very hard-to-test due to the presence of complex loop structures. Although to achieve high fault coverage it is essential to symbolically simulate all possible execution paths, we have come up with a case splitting mechanism which makes use of path sensitization information from the faulty location to primary outputs so that the size of formulae to be solved is significantly reduced. Experimental results show robustness and reliability of our method compared to the state-of-the-art RTL ATPG techniques. In addition, the results indicate that, in comparison with [8], with case splitting the ATPG time has been reduced by 22%-41%.
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