This paper describes the design of an offset-minimized CMOS comparator with post-manufacturing calibration using non-volatile phase-change random access ...
Abstract—This paper describes the design of an offset-minimized. CMOS comparator with post-manufacturing calibration using non-volatile phase-change random ...
This paper describes the design of an offset-minimized CMOS comparator with post-manufacturing calibration using non-volatile phase-change random access ...
Post-silicon calibration of analog CMOS using phase-change memory cells ... cmos integrated circuits calibration generators phase change random access memory ...
This paper describes the design of an offset-minimized CMOS comparator with post-manufacturing calibration using non-volatile phase-change random access ...
This paper describes the design and fabrication of a digital look-up table (LUT) circuit using phase-change random access memory (PCRAM) cells. The LUT, ...
This paper describes the design of an offset-minimized CMOS comparator with post-manufacturing calibration using non-volatile phase-change random access ...
Post-Silicon Calibration of Analog CMOS Using Phase-Change Memory Cells ... C.-Y. Wen, J. Paramesh, L. T. Pileggi, J. Li, S. Kim, J. Proesel, C. Lam, “Post- ...
Post-silicon calibration of analog CMOS using phase-change memory cells. Wen<sup>S</sup>, C., Paramesh, J., Pileggi, L., Li, J., Kim, S., Proesel, J., & Lam, C.
Publications (1). Post-silicon calibration of analog CMOS using phase-change memory cells (2011). 2011 Proceedings of the ESSCIRC (ESSCIRC), Sept, 2011.