This paper describes two sensing techniques to overcome this problem: a current sense amplifier and a charge transfer sense amplifier and their implementation ...

Abstract. CMOS technology and architecture trends are causing the speed of VLSI systems to be increasingly limited by the large capacitance of cache ...

Low voltage sensing techniques and secondary design issues for sub-90nm caches · M. Sinha, S. Hsu, +3 authors. S. Borkar · Published in European Solid-State ...

This paper describes two sensing techniques to overcome this problem: a current sense amplifier and a charge transfer sense amplifier and their implementation ...

Oct 10, 2009 · Low voltage sensing techniques and secondary design issues for sub90nm caches. Sinha, Manoj. Dpt El. and Computer Engineering University of ...

This paper describes two sensing techniques to overcome this problem: a current sense amplifier (CSA) and a charge transfer sense amplifier (CTSA) and their ...

M. Sinha et. al., "Low voltage sensing techniques and secondary design issues for sub 90nm caches," ESSCIRC, 2003, pp. 413-416. ... K. Agawa et. al, "A Bitline ...

Low voltage sensing techniques and secondary design issues for sub-90nm caches · High-Performance and Low-Voltage Sense-Amplifier Techniques for sub-90 nm SRAM.

In this study, we investigate different cache fault-tolerance techniques to determine which will be most effective when on-chip memory cell defect ...

Borkar, " Low Voltage. Sensing Techniques and Secondary Design Issues for sub-90nm Caches," European Solid. State Circuits Conference, 2003, pp. 413-416. [83] ...