Computation of steady-state CMOS latchup characteristics - IEEE Xplore
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Abstract: Robust computational techniques are presented for steady-state characterization of CMOS latchup via numerical device simulation.
Abstract: Robust computational techniques are presented for steady-state characterization of CMOS latchup via numerical device simulation.
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In particular, it is impossible to unambiguously relate the gain parameters of virtual transistors to real dimensions, geometry, temperature and material.
Missing: Computation | Show results with:Computation
The latchup phenomenon occurs in Complimentary Metal-Oxide-Silicon (CMOS) when a low-impedance stable state forms between the power rails. The phenomenon is ...
Aug 13, 2024 · Analysis of the steady-state Kirchhoff equations within the framework of a new physics-based equivalent circuit provides explicit ...
This model establishes the correlation between the major latch-up characteristics parameters (holding voltage, holding current and triggering current) and the ...
Missing: Computation steady-
Smith: Computation of steady-state CMOS latchup characteristics. IEEE Trans. Computer-aided Design, vol. 7, 1988, p. 307. 10.1109/43.3162. Web of Science ...
CMOS latchup is modeled and latchup criteria are constructed. Ac- cording to the model and the criteria, conditions which lead to laitchup.
Missing: Computation steady-
Aug 14, 2024 · Analysis of the steady-state Kirchhoff equations within the framework of a new physics-based equivalent circuit provides explicit expressions ...
Missing: characteristics. | Show results with:characteristics.