In the present work we will show our complementary TFET technology, which allows for the co-planar integration of InAs/Si p-TFETs and InAs/GaSb n-TFETs.
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Abstract—In the present work we will show our complementary TFET technology, which allows for the co-planar integration of InAs/Si p-TFETs and InAs/GaSb ...
Abstract—In the present work we will show our complementary TFET technology, which allows for the co-planar integration of InAs/Si p-TFETs and InAs/GaSb ...
In the present work we will show our complementary TFET technology, which allows for the co-planar integration of InAs/Si p-TFETs and InAs/GaSb n-TFETs.
Nov 4, 2024 · We provide an in-depth experimental characterization of TFETs analyzing the fundamental physical behavior at different temperature regimes.
Missing: Complementary | Show results with:Complementary
In this paper we will give a general overview of the development of TFETs, discuss the challenges and opportunities both at the individual device level as well ...
Missing: heterostructure | Show results with:heterostructure
Feb 22, 2017 · These devices are the first demonstration of a complementary III-V heterostructure TFET technology on silicon that yields transistors at ...
Sep 21, 2016 · We demonstrate for the first time a technology which allows the monolithic integration of both p-Type (InAs-Si) and n-Type (InAs-GaSb) ...
May 3, 2016 · For p-type. TFETs, the locally strained area can be extended into the channel to form a quantum well, giving rise to even larger ON state.
In 2011, Dewey from Intel published a III-V heterostructure TFET with a high Ion and a subthreshold slope < 60 mV/dec in the range of two decades [64].