In this paper we present an application-specific microprocessor core with a stack architecture optimized for use in broadband telecommunication ASICs.

In this paper we present an application-specific micropro- cessor core with a stack architecture optimized for the use in broadband telecommunication ASICs.

It handles over 1 million interrupts per second from 29 asynchronous sources. Due to this high interrupt rate extremely efficient context switching is required: ...

Markus Thalmann, Norbert Felber, Wolfgang Fichtner, "An embedded stack microprocessor for SDH telecommunication applications", Proceedings of the IEEE 1998 ...

... an embedded processor which substitutes various large hardware blocks. Read more. An embedded stack microprocessor for SDH telecommunication applications.

We describe an algorithm for interface synthesis and optimization for embedded system components such as microprocessors, memory ASIC, and network subsystems.

Wolfgang Fichtner: Design and Verification of a Stack Processor Virtual Component. ... An embedded stack microprocessor for SDH telecommunication applications.

To increase productivity, designers devise fairly general building blocks, or virtual components (VCs), from which various ASIC architectures are then designed.

al., “An Embedded Stack Microprocessor for SDH Telecommunication Applications ... embedded stack microprocessor for handling all overhead byte processing.

We offer highly integrated SyncE timing products with advanced features that support precise end-to-end voice, video and data transmission.