Targeting at lower power, less latency, and higher density, this work investigates and optimizes the read and write approaches to MLC FeFET NVM design.
Abstract – Ferroelectric FETs (FeFETs) have emerged as a promising multi-level/cell (MLC) nonvolatile memory (NVM) candidate for low-power applications.
This work investigates and optimizes the read and write approaches to MLC FeFET NVM design and shows significant latency and energy improvement.
This paper proposes a 12 transistor (12T) NOR type hybrid MOSFET and Memristor based Ternary Content Addressable Memory (TCAM) system. The design is compared ...
Adaptive circuit approaches to low-power multi-level/cell FeFET memory. J Wu, Y Xu, B Xue, Y Wang, Y Liu, H Yang, X Li. 2020 25th Asia and South Pacific Design ...
Apr 24, 2024 · This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) ...
Jan 11, 2024 · Based on derived FeFET device and circuit constraints, FeReX filters and encodes fea- sible search and stored voltage configurations to ...
Detailed BLiM operations and benchmarking against conventional approaches show the promise of low-power computing with the FeFET-based circuit techniques.
Aug 10, 2020 · This work proposes a low-power BLiM approach using the emerging nonvolatile ferroelectric FETs with direct write-back and data-adaptive dynamic ...
In this paper, we propose an all-in-memory scheme performing computation and conversion at once, utilizing programmable FeFET synapses to build the comparator ...
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