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Nov 12, 2019 · This article presents a 14-bit 4-MS/s voltage-controlled oscillator (VCO)-based successive approximation register (SAR) analog-to-digital converter (ADC).
Abstract—This article presents a 14-bit 4-MS/s voltage- controlled oscillator (VCO)-based successive approximation register (SAR) analog-to-digital ...
A novel SAR ADC based on digital calibration algorithm for large-size OLED display touch system is proposed to improve the SFDR over 30 dB.
Nov 1, 2023 · A 14-bit 1-MS/s SAR ADC with a segmented capacitor array and background mismatch calibration for IoT sensing applications. Authors: Chang Zhang.
Dec 11, 2024 · A 14-bit 4-MS/s VCO-Based SAR ADC With Deep Metastability-Facilitated Mismatch Calibration. Article. Nov 2019. Zheng Zhu · Xiong Zhou · Yuheng ...
Zhu et al. A 14-bit 4-MS/s VCO-based SAR ADC with deep metastability-facilitated mismatch calibration. IEEE J. Solid State Circ. (2020). Cjr Shi et al ...
A 6.4 MS/s 13 b ADC with a low-power background calibration for DAC mismatch and comparator offset errors is presented and achieves 20 dB spur reduction ...
Du, et al., A 14-bit 4-MS/s VCO-based SAR ADC with deep metastability-facilitated mismatch calibration, IEEE J. Solid State Circ. 55 (6) (2020) 1565–1576 ...
Oct 22, 2024 · A 14-bit 4-MS/s VCO-Based SAR ADC With Deep Metastability-Facilitated Mismatch Calibration. Article. Nov 2019. Zheng Zhu · Xiong Zhou · Yuheng ...
A 14-bit 4-MS/s VCO-Based SAR ADC With Deep Metastability Facilitated Mismatch Calibration ... This article presents a 14-bit 4-MS/s voltage-controlled ...
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