Sep 22, 2017 · Abstract: A 128-kb ultra-low voltage SRAM, based on a leakage optimized single-WELL 7T bitcell in 28-nm FD-SOI technology is presented.

A 128-kb ultra-low voltage SRAM, based on a leakage optimized single-WELL 7T bitcell in 28-nm FD-SOI technology is presented. An ideal power management ...

Abstract—A 128-kb ultra-low voltage SRAM, based on a leakage optimized single-WELL 7T bitcell in 28-nm FD-SOI technology is presented.

Aug 29, 2017 · A 128kb ultra-low voltage SRAM, based on a leakage optimized single-WELL 7T bitcell in 28 nm FD–SOI technology is presented.

This work presents a 16kB ultra-low power (ULP) SRAM macro in 28nm FD-SOI with high energy efficiency in active mode and ultra-low leakage (ULL) in sleep ...

A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3 V 7T sense-amplifierless SRAM in 28 nm FD-SOI. B Mohammadi, O Andersson, J Nguyen, L Ciampolini, A Cathelin, ...

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD–SOI · Computer Science, Engineering. IEEE Transactions on Circuits and Systems Part 1… · 2018.

The proposed LP10T SRAM cell offers improved read stability and write-ability while significantly reducing power consumption.

A 128 kb 7T SRAM using a single-cycle boosting mechanism in 28-nm FD–SOI. B ... Dynamic single-p-well SRAM bitcell characterization with back-bias ...

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI ... 7T sense-amplifierless SRAM in 28 nm FD-SOI. Conference Paper. Sep 2016.