Article

Design and implementation of the POWER5™ microprocessor

DAC '04: Proceedings of the 41st annual Design Automation Conference

Pages 670 - 672

https://doi.org/10.1145/996566.996749

Published: 07 June 2004 Publication History

Abstract

POWER5 offers significantly increased performance over previous POWER designs by incorporating simultaneous multithreading, an enhanced memory subsystem, and extensive RAS and power management support. The 276M transistor processor is implemented in 130nm silicon-on-insulator technology with 8-level of Cu metallization and operates at >1.5 GHz.

References

[1]

R. Kalla, B. Sinharoy, J. Tendler, "A SMT Implementation in POWER5", Hot Chips, August 15, 2003.

Google Scholar

[2]

P. J. Restle et al, "A Clock Distribution Method for Microprocessors", IEEE JSSC, Vol. 36, pp. 792--799, May 2001.

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Gadogbe BYang RBanahene KEbenezer PGeiger RChen D(2023)Very Compact Temperature Sensor for Power/Thermal Management2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS57524.2023.10406060(142-146)Online publication date: 6-Aug-2023
https://doi.org/10.1109/MWSCAS57524.2023.10406060
Khadirsharbiyani SKotra JRao KKandemir M(2022)Data ConvectionProceedings of the ACM on Measurement and Analysis of Computing Systems10.1145/35080276:1(1-25)Online publication date: 28-Feb-2022
https://dl.acm.org/doi/10.1145/3508027
Olukotun KHammond LLaudon JOlukotun KHammond LLaudon J(2022)Improving ThroughputChip Multiprocessor Architecture10.1007/978-3-031-01720-9_2(21-59)Online publication date: 5-Mar-2022
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Design and implementation of the POWER5™ microprocessor
1. Hardware

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Published In

DAC '04: Proceedings of the 41st annual Design Automation Conference

June 2004

1002 pages

ISBN:1581138288

DOI:10.1145/996566

General Chair:
Sharad Malik
Princeton University, Princeton, NJ
,
Program Chairs:
Limor Fix
Intel Semiconductors Ltd., Haifa, Israel
,
Andrew B. Kahng
University of California at San Diego, La Jolla, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 June 2004

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DAC04: The 41st Annual Design Automation Conference 2004

June 7 - 11, 2004

CA, San Diego, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

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Gadogbe BYang RBanahene KEbenezer PGeiger RChen D(2023)Very Compact Temperature Sensor for Power/Thermal Management2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS57524.2023.10406060(142-146)Online publication date: 6-Aug-2023
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Khadirsharbiyani SKotra JRao KKandemir M(2022)Data ConvectionProceedings of the ACM on Measurement and Analysis of Computing Systems10.1145/35080276:1(1-25)Online publication date: 28-Feb-2022
https://dl.acm.org/doi/10.1145/3508027
Olukotun KHammond LLaudon JOlukotun KHammond LLaudon J(2022)Improving ThroughputChip Multiprocessor Architecture10.1007/978-3-031-01720-9_2(21-59)Online publication date: 5-Mar-2022
https://doi.org/10.1007/978-3-031-01720-9_2
Shor J(2021)Compact Thermal Sensors for Dense CPU Thermal Monitoring and Regulation: A ReviewIEEE Sensors Journal10.1109/JSEN.2020.302985221:11(12774-12788)Online publication date: 1-Jun-2021
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Aghaee NPeng ZEles P(2013)Process-Variation and Temperature Aware SoC Test Scheduling TechniqueJournal of Electronic Testing: Theory and Applications10.1007/s10836-013-5374-z29:4(499-520)Online publication date: 1-Aug-2013
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Hu VFan MSu PChuang CChang NNakamura HInoue KOsada KPoncino M(2011)Analysis of power-performance for ultra-thin-body GeOI logic circuitsProceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design10.5555/2016802.2016835(115-120)Online publication date: 1-Aug-2011
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