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A design study of a shared resource computing system

Published: 17 January 1976 Publication History

Abstract

The motivations for the design study of a modular, shared resource computing system are given by discussing fault-tolerance and resource utilization issues in parallel processing architectures. A design is presented which employs an array of pipelined arithmetic processors to perform array operations. The design provides for fault-tolerance (“graceful degradation”) capability and is efficient in using main memory bandwidth. Various architectural tradeoffs of the design are discussed. Some results of simulations used for the verification of design decisions are also reported.

References

[1]
Avizienis, A., "Architecture of Fault-Tolerant Computing Systems," Proceedings International Symposium on Fault-Tolerant Computing, Paris, France, June 1975, pp. 3-16.
[2]
Flynn, M. J., "Trends and Problems in Computer Organizations," Proceedings of IFIP Congress 74, Stockholm, Sweden, August 5-10, 1974, pp. 3-10.
[3]
Iverson, K. E., A Programming Language, J. Wiley and Sons, New York, 1962.
[4]
Hintz, R. G. and D. P. Tate, "Control Data STAR-100 Processor Design," Proceedings Sixth Annual IEEE Computer Society International Conference, San Francisco, California, September 1972, pp. 1-4.
[5]
Texas Instruments, Inc., The ASC System - Central Processor, Austin, Texas, 1973.
[6]
Giloi, W. K. and H. Berg, "STARLET - an Unorthodox Concept of a STRING/ARRAY Computer," Proceedings of IFIP Congress 74, Stockholm, Sweden, August 5-10, 1974, pp. 103-107.
[7]
Ruggiero, J. F. and D. A. Caryell, "An Auxiliary Processing System for Array Calculations," IBM Systems Journal, Vol. 8, No. 2, 1967, pp. 118-135.
[8]
Barnes, G. H. et al., "The Illiac IV Computer," IEEE Transactions on Computers, Vol. C-17, No. 8, August 1968, pp. 746-757.
[9]
Crane, A. B. et al., "PEPE Computer Architecture," Proceedings Sixth Annual IEEE Computer Society International Conference, San Francisco, California, September 1972, pp. 57-60.
[10]
Flynn, M. J., "Some Computer Organizations and Their Effectiveness," IEEE Transactions on Computers, Vol. C-21, No. 9, September 1972, pp. 948-960.
[11]
Thurber, K. J. and P. C. Patton, "The Future of Parallel Processing," IEEE Transactions on Computers, (Correspondence), Vol. C-22, No. 12, December 1973, pp. 1140-1143.
[12]
Chen, T. C., "Parallelism, Pipelining and Computer Efficiency," Computer Design, January 1971, pp. 365-372.
[13]
Kleinrock, L., "Resource Allocation in Computer Systems and Computer Communication Networks," Proceedings of IFIP Congress 74, Vol. 1, pp. 11-18.
[14]
Owen, J. E., "The Influence of Machine Organization on Algorithms," Complexity of Sequential and Parallel Numerical Algorithms, Ed. J. F. Traub, Academic Press, 1973, pp. 111-130.
[15]
Wedel, D., "FORTRAN for Texas Instruments ASC System," SIGPLAN Notices, Vol. 10, No. 3, March 1975, pp. 119-132.
[16]
Abrams, P. S., "An APL Machine," SLAC Report No. 114, Stanford University, Stanford, California, October 1970.
[17]
Tomasula, R. M., "An Efficient Algorithm for Exploiting Multiple Arithmetic Units," IBM Journal of Research and Development, Vol. 11, No. 1, January, 1967, pp. 25-33.
[18]
Lesser, V. R., "Dynamic Control Structures and Their Use in Emulation," SLAC Report No. 157, Stanford University, Stanford, California, October 1972.
[19]
Kernighan, B. W., "Optimal Sequential Partitions of Graphs," Journal of the ACM, Vol. 18, No. 1, January 1971, pp. 34-40.
[20]
Thomasian, A. and A. Avizienis, "Dynamic Scheduling of Tasks Requiring Multiple Processors," Proceedings Eleventh Annual IEEE Computer Society International Conference, Washington, D.C., September 9-11, 1975, pp. 77-80.
[21]
Thomasian, A., "The Design Study of a Shared-Resource Parallel Processing System," Ph.D. Dissertation, in progress, Computer Science Department, University of California, (to be available in June 1976).

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Published In

cover image ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News  Volume 4, Issue 4
January 1976
210 pages
ISSN:0163-5964
DOI:10.1145/633617
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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 17 January 1976
Published in SIGARCH Volume 4, Issue 4

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