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NoxyGen: A Network-On-Chip RTL Generator and Validation Tool

Published: 28 October 2023 Publication History

Abstract

We present NoxyGen, a Network-On-Chip(NoC) design and evaluation tool which generates NoC RTL in Verilog and functionally validates generated RTL. NoxyGen comes with parameterizable NoC router built using modular latency-insensitive pipeline stages, facilitating easy modifications. We describe the internal micro-architecture and configurable parameters of the router. Network statistics can be obtained by running synthetic traffics. Evaluation with synthetic benchmarks shows the effectiveness and correctness of the generated NoC RTL design by NoxyGen. For prototyping, we build a multicore system with Xilinx Microblaze cores connected using NoC on an FPGA and run message-passing (MPI) applications. We make NoxyGen open-source so that it can be used by the scientific community for further research on NoC and prototype their proposals to be run on FPGA.

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    cover image ACM Conferences
    NoCArc '23: Proceedings of the 16th International Workshop on Network on Chip Architectures
    October 2023
    61 pages
    ISBN:9798400703072
    DOI:10.1145/3610396
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    Published: 28 October 2023

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    NoCArc '23 Paper Acceptance Rate 5 of 14 submissions, 36%;
    Overall Acceptance Rate 46 of 122 submissions, 38%

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