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FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface

Published: 10 August 2020 Publication History

Abstract

Compute-in-memory (CiM) is a promising method for mitigating the memory wall problem in data-intensive applications. The proposed bitwise logic-in-memory (BLiM) is targeted at data intensive applications, such as database, data encryption. This work proposes a low-power BLiM approach using the emerging nonvolatile ferroelectric FETs with direct write-back and data-adaptive dynamic sensing interface. Apart from general-purpose random-access memory, it also supports BLiM operations such as copy, not, nand, xor, and full adder (FA). The novel features of the proposed architecture include: (i) direct result-write-back based on the remnant bitline BLiM charge that avoids bitline sensing and charging operations; (ii) a fully dynamic sensing interface that needs no static reference current, but adopts data-adaptive voltage references for certain multi-operand operations, and (iii) selective bitline charging from wordline (instead of pre-charging all bitlines) to save power and also enable direct write-back. Detailed BLiM operations and benchmarking against conventional approaches show the promise of low-power computing with the FeFET-based circuit techniques.

Supplementary Material

MP4 File (3370748.3406572.mp4)
In this video, we will introduce the background of computing-in-memory (CiM), the motivation of our work, our proposed bitwise logic-in-memory (BLiM) design, circuit performance and AES implementation. Our proposed BLiM is targeted at data intensive applications, such as database and data encryption, to mitigate the memory wall problem. This work proposes a low-power BLiM approach using the emerging nonvolatile ferroelectric FETs. Our design supports BLiM operations such as copy, not, nand, and xor. The novel features include: (i) direct result-write-back based on the remnant bitline (BL) charge that avoids BL sensing and charging operations; (ii) a fully dynamic sensing interface that needs no static reference current, but adopts data-adaptive voltage references for certain operations, and (iii) selective BL charging from wordline (instead of charging all BLs) to save power. Detailed benchmarking against prior approaches show the promise of low-power computing with the FeFET-based circuit techniques.

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    cover image ACM Conferences
    ISLPED '20: Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design
    August 2020
    263 pages
    ISBN:9781450370530
    DOI:10.1145/3370748
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    Published: 10 August 2020

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    Author Tags

    1. FeFET
    2. bitwise logic-in-memory
    3. compute-in-memory
    4. embedded memory
    5. memory wall
    6. nonvolatile memory

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