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LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization

Authors:

Jin Lin,

Eric GarciaAuthors Info & Claims

LLVM-HPC'17: Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC

Article No.: 4, Pages 1 - 11

https://doi.org/10.1145/3148173.3148191

Published: 12 November 2017 Publication History

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Abstract

With advances of modern multi-core processors and accelerators, many modern applications are increasingly turning to compiler-assisted parallel and vector programming models such as OpenMP, OpenCL, Halide, Python and TensorFlow. It is crucial to ensure that LLVM-based compilers can optimize parallel and vector code as effectively as possible. In this paper, we first present a set of updated LLVM IR extensions for explicitly parallel, vector, and offloading program constructs in the context of C/C++/OpenCL. Secondly, we describe our LLVM design and implementation for advanced features in OpenMP such as parallel loop reduction, task and taskloop, SIMD loop and functions, and we discuss the impact of our updated implementation on existing LLVM optimization passes. Finally, we present a re-use case of our infrastructure to enable explicit parallelization and vectorization extensions in our OpenCL compiler to achieve ~35x performance speedup for a well-known autonomous driving workload on a multi-core platform configured with Intel® Xeon® Scalable Processors.

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X. Tian, H. Saito, E. Su, A. Gaba, M. Masten, E. Garcia, A. Zaks, "LLVM Framework and IR Extensions for Parallelization, SIMD Vectorization and Offloading". LLVM-HPC@SC 2016: 21--31.

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He YPodobas AMarkidis S(2024)Leveraging MLIR for Loop Vectorization and GPU Porting of FFT LibrariesEuro-Par 2023: Parallel Processing Workshops10.1007/978-3-031-50684-0_16(207-218)Online publication date: 16-Apr-2024
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Lai HLee JHwang Y(2023)Enhancing LLVM Optimizations for Linear Recurrence Programs on RVVProceedings of the 52nd International Conference on Parallel Processing Workshops10.1145/3605731.3605904(79-87)Online publication date: 7-Aug-2023
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LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization
1. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types

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LLVM-HPC'17: Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC

November 2017

106 pages

ISBN:9781450355650

DOI:10.1145/3148173

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Published: 12 November 2017

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SC '17: The International Conference for High Performance Computing, Networking, Storage and Analysis

November 12 - 17, 2017

CO, Denver, USA

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LLVM-HPC'17 Paper Acceptance Rate 9 of 10 submissions, 90%;

Overall Acceptance Rate 16 of 22 submissions, 73%

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Chen WLuo XCai HWang H(2024)Towards Smart Contract Fuzzing on GPUs2024 IEEE Symposium on Security and Privacy (SP)10.1109/SP54263.2024.00229(2255-2272)Online publication date: 19-May-2024
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He YPodobas AMarkidis S(2024)Leveraging MLIR for Loop Vectorization and GPU Porting of FFT LibrariesEuro-Par 2023: Parallel Processing Workshops10.1007/978-3-031-50684-0_16(207-218)Online publication date: 16-Apr-2024
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Lai HLee JHwang Y(2023)Enhancing LLVM Optimizations for Linear Recurrence Programs on RVVProceedings of the 52nd International Conference on Parallel Processing Workshops10.1145/3605731.3605904(79-87)Online publication date: 7-Aug-2023
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LLVM framework and IR extensions for parallelization, SIMD vectorization and offloading

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LLVM framework and IR extensions for parallelization, SIMD vectorization and offloading

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